Gabor Dozsa 5dec4e07b8 dev: Distributed Ethernet link for distributed gem5 simulations ... Distributed gem5 (abbreviated dist-gem5) is the result of the convergence effort between multi-gem5 and pd-gem5 (from Univ. of Wisconsin). It relies on the base multi-gem5 infrastructure for packet forwarding, synchronisation and checkpointing but combines those with the elaborated network switch model from pd-gem5. --HG-- rename : src/dev/net/multi_etherlink.cc => src/dev/net/dist_etherlink.cc rename : src/dev/net/multi_etherlink.hh => src/dev/net/dist_etherlink.hh rename : src/dev/net/multi_iface.cc => src/dev/net/dist_iface.cc rename : src/dev/net/multi_iface.hh => src/dev/net/dist_iface.hh rename : src/dev/net/multi_packet.hh => src/dev/net/dist_packet.hh		2016-01-07 16:33:47 -06:00
..
alpha	dev: Move storage devices to src/dev/storage/	2015-12-10 10:35:23 +00:00
arm	dev: Move storage devices to src/dev/storage/	2015-12-10 10:35:23 +00:00
i2c	dev: Add missing SConscript in src/dev/i2c	2015-12-10 18:46:02 +00:00
mips	dev, mips: Remove the unused MaltaPChip class	2015-12-03 23:09:34 +00:00
net	dev: Distributed Ethernet link for distributed gem5 simulations	2016-01-07 16:33:47 -06:00
pci	dev: Move the CopyEngine class to src/dev/pci	2015-12-10 10:35:16 +00:00
sparc	dev: Move storage devices to src/dev/storage/	2015-12-10 10:35:23 +00:00
storage	dev: Move storage devices to src/dev/storage/	2015-12-10 10:35:23 +00:00
virtio	dev: Move storage devices to src/dev/storage/	2015-12-10 10:35:23 +00:00
x86	dev: Rewrite PCI host functionality	2015-12-05 00:11:24 +00:00
baddev.cc	dev: Include basic devices in NULL ISA build	2014-02-18 05:50:59 -05:00
baddev.hh	AddrRange: Transition from Range<T> to AddrRange	2012-09-19 06:15:44 -04:00
BadDevice.py	sim: Include object header files in SWIG interfaces	2012-11-02 11:32:01 -05:00
Device.py	dev: Fix IsaFake's cxx_header setting	2014-03-23 11:11:37 -04:00
dma_device.cc	mem: Make cache terminology easier to understand	2015-12-31 09:32:58 -05:00
dma_device.hh	misc: Add explicit overrides and fix other clang >= 3.5 issues	2015-10-12 04:08:01 -04:00
intel_8254_timer.cc	sim: Refactor the serialization base class	2015-07-07 09:51:03 +01:00
intel_8254_timer.hh	sim: Refactor the serialization base class	2015-07-07 09:51:03 +01:00
io_device.cc	mem: Use the packet delays and do not just zero them out	2015-11-06 03:26:36 -05:00
io_device.hh	sim: Decouple draining from the SimObject hierarchy	2015-07-07 09:51:05 +01:00
isa_fake.cc	mem: Remove redundant Packet::allocate calls	2014-12-02 06:07:41 -05:00
isa_fake.hh	AddrRange: Transition from Range<T> to AddrRange	2012-09-19 06:15:44 -04:00
mc146818.cc	sim: Refactor the serialization base class	2015-07-07 09:51:03 +01:00
mc146818.hh	sim: Refactor the serialization base class	2015-07-07 09:51:03 +01:00
pixelpump.cc	dev: Implement a simple display timing generator	2015-08-07 09:59:26 +01:00
pixelpump.hh	misc: Remove redundant compiler-specific defines	2015-10-12 04:07:59 -04:00
platform.cc	dev: Rewrite PCI host functionality	2015-12-05 00:11:24 +00:00
platform.hh	dev: Rewrite PCI host functionality	2015-12-05 00:11:24 +00:00
Platform.py	sim: Include object header files in SWIG interfaces	2012-11-02 11:32:01 -05:00
ps2.cc	dev: Support translating left and right ALT keys.	2014-12-03 03:06:03 -08:00
ps2.hh	ARM: PS2 encoding fix	2012-06-05 01:23:10 -04:00
rtcreg.h	dev: Clean up MC146818 register (A & B) handling	2013-06-03 12:28:41 +02:00
SConscript	dev: Move storage devices to src/dev/storage/	2015-12-10 10:35:23 +00:00
terminal.cc	base: Rewrite the CircleBuf to fix bugs and add serialization	2015-08-07 09:59:19 +01:00
terminal.hh	base: Rewrite the CircleBuf to fix bugs and add serialization	2015-08-07 09:59:19 +01:00
Terminal.py	sim: Include object header files in SWIG interfaces	2012-11-02 11:32:01 -05:00
uart.cc	dev: Refactor terminal<->UART interface to make it more generic	2014-09-20 17:17:50 -04:00
uart.hh	dev: Refactor terminal<->UART interface to make it more generic	2014-09-20 17:17:50 -04:00
Uart.py	sim: Include object header files in SWIG interfaces	2012-11-02 11:32:01 -05:00
uart8250.cc	sim: Refactor the serialization base class	2015-07-07 09:51:03 +01:00
uart8250.hh	misc: Add explicit overrides and fix other clang >= 3.5 issues	2015-10-12 04:08:01 -04:00