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bare_iron
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Get rid of 'using namespace' declarations in headers.
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2009-03-05 17:15:31 -08:00 |
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isa
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Registers: Get rid of the float register width parameter.
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2009-07-08 23:02:20 -07:00 |
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linux
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Get rid of 'using namespace' declarations in headers.
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2009-03-05 17:15:31 -08:00 |
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regfile
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Registers: Eliminate the ISA defined RegFile class.
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2009-07-08 23:02:21 -07:00 |
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BISystem.py
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fix MIPS headers
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2007-11-15 14:21:01 -05:00 |
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dsp.cc
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gcc: Add extra parens to quell warnings.
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2008-09-27 21:03:49 -07:00 |
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dsp.hh
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includes: sort includes again
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2009-05-17 14:34:52 -07:00 |
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dt_constants.hh
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go back and fix up MIPS copyright headers
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2007-11-16 21:32:22 -05:00 |
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faults.cc
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Registers: Eliminate the ISA defined RegFile class.
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2009-07-08 23:02:21 -07:00 |
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faults.hh
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go back and fix up MIPS copyright headers
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2007-11-16 21:32:22 -05:00 |
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idle_event.cc
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arch: TheISA shouldn't really ever be used in the arch directory.
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2008-09-27 21:03:46 -07:00 |
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idle_event.hh
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fix MIPS headers
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2007-11-15 14:21:01 -05:00 |
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interrupts.cc
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style: Use the correct m5 style for things relating to interrupts.
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2008-10-21 07:12:53 -07:00 |
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interrupts.hh
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style: Use the correct m5 style for things relating to interrupts.
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2008-10-21 07:12:53 -07:00 |
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isa.cc
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Registers: Add an ISA object which replaces the MiscRegFile.
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2009-07-08 23:02:20 -07:00 |
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isa.hh
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Registers: Add an ISA object which replaces the MiscRegFile.
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2009-07-08 23:02:20 -07:00 |
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isa_traits.hh
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includes: sort includes again
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2009-05-17 14:34:52 -07:00 |
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kernel_stats.hh
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fix MIPS headers
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2007-11-15 14:21:01 -05:00 |
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locked_mem.hh
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get rid of all instances of readTid() and getThreadNum(). Unify and eliminate
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2008-11-04 11:35:42 -05:00 |
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microcode_rom.hh
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CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
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2008-10-12 15:59:21 -07:00 |
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mips_core_specific.cc
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alpha: Get rid fo the namespace called EV5.
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2008-09-27 21:03:45 -07:00 |
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mips_core_specific.hh
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move initCPU, processInterrupts declaration to core_specific file.
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2007-11-16 21:31:37 -05:00 |
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MipsCPU.py
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Add in files from merge-bare-iron, get them compiling in FS and SE mode
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2007-11-13 16:58:16 -05:00 |
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MipsInterrupts.py
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Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.
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2008-10-12 09:09:56 -07:00 |
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MipsSystem.py
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Add in files from merge-bare-iron, get them compiling in FS and SE mode
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2007-11-13 16:58:16 -05:00 |
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MipsTLB.py
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tlb: Don't separate the TLB classes into an instruction TLB and a data TLB
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2009-04-08 22:21:27 -07:00 |
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mmaped_ipr.hh
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go back and fix up MIPS copyright headers
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2007-11-16 21:32:22 -05:00 |
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mt.hh
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types: add a type for thread IDs and try to use it everywhere
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2009-05-26 09:23:13 -07:00 |
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mt_constants.hh
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go back and fix up MIPS copyright headers
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2007-11-16 21:32:22 -05:00 |
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pagetable.cc
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go back and fix up MIPS copyright headers
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2007-11-16 21:32:22 -05:00 |
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pagetable.hh
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gcc: Add extra parens to quell warnings.
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2008-09-27 21:03:49 -07:00 |
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pra_constants.hh
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Add in files from merge-bare-iron, get them compiling in FS and SE mode
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2007-11-13 16:58:16 -05:00 |
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predecoder.hh
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types: Move stuff for global types into src/base/types.hh
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2009-05-17 14:34:50 -07:00 |
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process.cc
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syscall: Resolve conflicts between m5threads and Gabe's recent SE changes.
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2009-04-21 08:17:36 -07:00 |
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process.hh
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Processes: Make getting and setting system call arguments part of a process object.
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2009-02-27 09:22:14 -08:00 |
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regfile.hh
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go back and fix up MIPS copyright headers
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2007-11-16 21:32:22 -05:00 |
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remote_gdb.hh
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fix MIPS headers
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2007-11-15 14:21:01 -05:00 |
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SConscript
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Registers: Move the PCs out of the ISAs and into the CPUs.
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2009-07-08 23:02:21 -07:00 |
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SConsopts
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go back and fix up MIPS copyright headers
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2007-11-16 21:32:22 -05:00 |
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stacktrace.cc
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arch: TheISA shouldn't really ever be used in the arch directory.
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2008-09-27 21:03:46 -07:00 |
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stacktrace.hh
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arch: TheISA shouldn't really ever be used in the arch directory.
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2008-09-27 21:03:46 -07:00 |
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system.cc
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alpha: Get rid fo the namespace called EV5.
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2008-09-27 21:03:45 -07:00 |
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system.hh
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go back and fix up MIPS copyright headers
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2007-11-16 21:32:22 -05:00 |
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tlb.cc
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mips-tlb-fix: check for alignment faults.\nMIPS was never updated to use TLBS correcty in SE mode. The error was forwarding translations directly to pageTable. The TLB should check for alignment faults at bare minimum here but in the long run we should be using TLBs in SE mode for MIPS.
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2009-04-18 10:42:29 -04:00 |
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tlb.hh
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tlb: More fixing of unified TLB
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2009-04-08 22:21:27 -07:00 |
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types.hh
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Registers: Get rid of the float register width parameter.
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2009-07-08 23:02:20 -07:00 |
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utility.cc
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get rid of all instances of readTid() and getThreadNum(). Unify and eliminate
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2008-11-04 11:35:42 -05:00 |
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utility.hh
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Registers: Add an ISA object which replaces the MiscRegFile.
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2009-07-08 23:02:20 -07:00 |
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vtophys.cc
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go back and fix up MIPS copyright headers
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2007-11-16 21:32:22 -05:00 |
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vtophys.hh
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go back and fix up MIPS copyright headers
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2007-11-16 21:32:22 -05:00 |
