gem5/src/arch
Gabe Black 7770239792 SCons: Add a comment I forgot to add in earlier.
This comment was supposed to be added to an earlier change as part of review
feedback, but I accidentally left it out when I pushed. Add it in now.
2011-09-24 17:03:18 -07:00
..
alpha Faults: Get rid of the unused isAlignmentFault and isMachineCheckFault. 2011-09-19 06:17:20 -07:00
arm PseudoInst: Remove the now unnecessary #if FULL_SYSTEMs around pseudoinsts. 2011-09-19 02:40:19 -07:00
generic ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem. 2011-07-02 22:35:04 -07:00
mips MIPS: Final overhaul of MIPS faults to kill #if FULL_SYSTEM 2011-09-19 06:17:21 -07:00
noisa SCons: Support building without an ISA 2010-11-19 18:00:39 -06:00
power Faults: Get rid of the unused isAlignmentFault and isMachineCheckFault. 2011-09-19 06:17:20 -07:00
sparc Faults: Get rid of the unused isAlignmentFault and isMachineCheckFault. 2011-09-19 06:17:20 -07:00
x86 X86: Move the MSR lookup table out of the TLB and into its own file. 2011-09-23 02:42:22 -07:00
isa_parser.py ISA parser: Don't look for operands in strings. 2011-09-08 03:21:14 -07:00
micro_asm.py scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access 2009-09-22 15:24:16 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript SCons: Add a comment I forgot to add in earlier. 2011-09-24 17:03:18 -07:00