..
isa
create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99
2007-04-21 17:50:47 -04:00
linux
Ignore "time" and "times" syscalls.
2007-03-20 23:53:52 -04:00
solaris
Implement current working directory for LiveProcesses
2006-11-16 12:43:11 -08:00
arguments.cc
Replaced getArg with a SPARC implementation.
2006-11-08 00:32:04 -05:00
arguments.hh
implement vtophys and 32bit gdb support
2007-02-18 19:57:46 -05:00
asi.cc
Panic if any CMT registers are accessed
2007-03-08 21:49:13 -05:00
asi.hh
Panic if any CMT registers are accessed
2007-03-08 21:49:13 -05:00
faults.cc
Move the magic m5 PageTableFault into sim/faults.[hh,cc] since it's the same across all architectures.
2007-03-07 20:04:46 +00:00
faults.hh
Move the magic m5 PageTableFault into sim/faults.[hh,cc] since it's the same across all architectures.
2007-03-07 20:04:46 +00:00
floatregfile.cc
fix mostly floating point related
2007-02-02 18:04:42 -05:00
floatregfile.hh
Moved some constants from isa_traits.hh to the reg file headers.
2006-11-22 23:49:44 -05:00
handlers.hh
Forgot to commit this new file last earlier.
2007-03-02 14:43:27 +00:00
interrupts.hh
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
2007-03-07 15:04:31 -05:00
intregfile.cc
Make SPARC checkpointing work
2007-01-30 18:25:39 -05:00
intregfile.hh
Fixed an off-by-one error.
2007-03-08 00:55:16 -05:00
isa_traits.hh
Implement Niagara I/O interface and rework interrupts
2007-03-03 17:22:47 -05:00
kernel_stats.hh
Put kernel_stats back into arch.
2006-11-07 22:34:34 -05:00
locked_mem.hh
Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)
2006-10-08 10:53:24 -07:00
miscregfile.cc
get rid of CWP bounds warning...
2007-03-29 15:57:11 -04:00
miscregfile.hh
implement ipi stufff for SPARC
2007-03-09 16:56:39 -05:00
mmaped_ipr.hh
reogranize code to split off FS only misc regs with effect into their own file (reducing the number of if FULL_SYSTEM defines and includes)
2006-12-04 19:39:57 -05:00
pagetable.cc
Make SPARC checkpointing work
2007-01-30 18:25:39 -05:00
pagetable.hh
implement vtophys and 32bit gdb support
2007-02-18 19:57:46 -05:00
predecoder.hh
Compile fixes for SPARC_FS.
2007-03-18 23:09:51 -04:00
process.cc
Merge zizzer.eecs.umich.edu:/bk/newmem
2007-03-08 00:42:30 -05:00
process.hh
Make trap instructions always generate TrapInstruction Fault objects which call into the Process object to handle system calls. Refactored the Process objects, and move the handler code into it's own file, and add some syscalls which are used in a natively compiled hello world. Software traps with trap number 3 (not syscall number 3) are supposed to cause the register windows to be flushed but are ignored right now. Finally, made uname for SPARC report a 2.6.12 kernel which is what m22-018.pool happens to be running.
2007-02-28 16:36:38 +00:00
regfile.cc
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
2007-03-07 15:04:31 -05:00
regfile.hh
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
2007-03-07 15:04:31 -05:00
remote_gdb.cc
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
2007-03-07 15:04:31 -05:00
remote_gdb.hh
Fix up the remote gdb include gaurds so it doesn't use the same symbol as Alpha does.
2007-03-05 14:46:49 +00:00
SConscript
Rework the way SCons recurses into subdirectories, making it
2007-03-10 23:00:54 -08:00
SConsopts
Rework the way SCons recurses into subdirectories, making it
2007-03-10 23:00:54 -08:00
sparc_traits.hh
Move the SyscallReturn class into sim/syscallreturn.hh. Also move some miscregs into the integer register file so they get renamed.
2006-12-05 01:55:02 -05:00
stacktrace.cc
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
2007-03-07 15:04:31 -05:00
stacktrace.hh
Put the ProcessInfo and StackTrace objects into the ISA namespaces.
2006-11-08 00:52:04 -05:00
syscallreturn.hh
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
2007-03-07 15:04:31 -05:00
system.cc
make our code a little more standards compliant
2007-01-26 18:48:51 -05:00
system.hh
Initial work to make remote gdb available in SE mode. This is completely untested.
2006-12-20 18:39:40 -05:00
tlb.cc
Panic if any CMT registers are accessed
2007-03-08 21:49:13 -05:00
tlb.hh
implement vtophys and 32bit gdb support
2007-02-18 19:57:46 -05:00
tlb_map.hh
fix smul and sdiv to sign extend, and handle overflow/underflow corretly
2007-01-25 13:43:46 -05:00
types.hh
rename store conditional stuff as extra data so it can be used for conditional swaps as well
2007-02-12 13:06:30 -05:00
ua2005.cc
fix interrupting during a quisce on sparc
2007-03-13 00:05:52 -04:00
utility.hh
Merge zizzer.eecs.umich.edu:/bk/newmem
2007-03-15 02:52:51 +00:00
vtophys.cc
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
2007-03-07 15:04:31 -05:00
vtophys.hh
implement vtophys and 32bit gdb support
2007-02-18 19:57:46 -05:00