gem5/src/arch/sparc/isa
Ali Saidi e8ace88e89 create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99
(which defines fenv) doesn't necessarily extend to c++ and it is a problem with solaris. If really
desired this could wrap the ieeefp interface found in bsd* as well, but I see no need at the moment.

src/arch/alpha/isa/fp.isa:
src/arch/sparc/isa/formats/basic.isa:
    use m5_fesetround()/m5_fegetround() istead of fenv interface directly
src/arch/sparc/isa/includes.isa:
    use base/fenv instead of fenv directly
src/base/SConscript:
    add fenv to sconscript
src/base/fenv.hh:
src/base/random.cc:
    m5 implementation to standerdize fenv across platforms.

--HG--
extra : convert_revision : 38d2629affd964dcd1a5ab0db4ac3cb21438e72c
2007-04-21 17:50:47 -04:00
..
formats create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99 2007-04-21 17:50:47 -04:00
base.isa Create a filter and a union to translate the SPARC instruction implementations from using doubles to using concatenated singles. 2007-04-11 12:25:00 +00:00
bitfields.isa add pseduo instruction support for sparc 2007-02-21 21:06:17 -05:00
decoder.isa The syntax used for twin stores was confusing the parser so it's now broken down farther. 2007-03-17 21:23:03 -04:00
includes.isa create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99 2007-04-21 17:50:47 -04:00
main.isa Broke Load/Store instructions into microcode, and partially refactored memory operations in the SPARC ISA description. 2006-10-23 07:55:52 -04:00
operands.isa Create a filter and a union to translate the SPARC instruction implementations from using doubles to using concatenated singles. 2007-04-11 12:25:00 +00:00