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gem5/src/mem/ruby/system
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Andreas Hansson 49407d76aa Port: Add isSnooping to slave port (asking master port) 
This patch adds isSnooping to the slave port, and thus avoids going
through getMasterPort to be able to ask the master. Over the course of
the next few patches, all getMasterPort/getSlavePort in Port and
MemObject are to be protocol agnostic, and the snooping is part of the
protocol layer.

The function is already present on the master port, where it is
implemented by the module itself, e.g. a cache. On the slave side, it
is merely asking the connected master port. The same name is used by
both functions despite their difference in behaviour. The initial
design used isMasterSnooping on the slave port side, but the more
verbose function name was later changed.
2012-07-09 12:35:32 -04:00
..
AbstractMemOrCache.hh ruby: use RubyMemory flag & remove setDebug() functionality 2011-05-05 02:20:31 -04:00
AbstractReplacementPolicy.hh Ruby: Shuffle some of the included files 2011-12-31 18:44:51 -06:00
Cache.py Ruby Cache: Add param for marking caches as instruction only 2012-01-07 07:38:53 -06:00
CacheMemory.cc sim-ruby: checkpointing fixes and dependent eventq improvements 2012-04-06 13:47:07 -07:00
CacheMemory.hh Ruby: Add infrastructure for recording cache contents 2012-01-11 13:29:15 -06:00
DirectoryMemory.cc Ruby: Resurrect Cache Warmup Capability 2012-01-11 13:48:48 -06:00
DirectoryMemory.hh Ruby: Shuffle some of the included files 2011-12-31 18:44:51 -06:00
DirectoryMemory.py Ruby: Commit files missing from previous commit 2011-07-01 16:29:33 -05:00
DMASequencer.cc Ruby: Shuffle some of the included files 2011-12-31 18:44:51 -06:00
DMASequencer.hh Ruby: Resurrect Cache Warmup Capability 2012-01-11 13:48:48 -06:00
LRUPolicy.hh ruby: style pass 2010-03-22 18:43:53 -07:00
MachineID.hh Ruby: Remove some unused typedefs 2011-11-03 22:46:45 -05:00
MemoryControl.cc sim-ruby: checkpointing fixes and dependent eventq improvements 2012-04-06 13:47:07 -07:00
MemoryControl.hh sim-ruby: checkpointing fixes and dependent eventq improvements 2012-04-06 13:47:07 -07:00
MemoryControl.py ruby: Added copyright to many Ruby *.py files 2010-03-21 21:22:20 -07:00
MemoryNode.cc ruby: style pass 2010-03-22 18:43:53 -07:00
MemoryNode.hh ruby: style pass 2010-03-22 18:43:53 -07:00
MemoryVector.hh sim-ruby: checkpointing fixes and dependent eventq improvements 2012-04-06 13:47:07 -07:00
PerfectCacheMemory.hh clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6 2012-04-14 05:43:31 -04:00
PersistentTable.cc ruby: get rid of the Map class 2010-06-10 23:17:07 -07:00
PersistentTable.hh Ruby: Shuffle some of the included files 2011-12-31 18:44:51 -06:00
PseudoLRUPolicy.hh GCC: Get everything working with gcc 4.6.1. 2011-10-31 01:09:44 -07:00
RubyPort.cc Port: Add isSnooping to slave port (asking master port) 2012-07-09 12:35:32 -04:00
RubyPort.hh MEM: Separate requests and responses for timing accesses 2012-05-01 13:40:42 -04:00
RubyPortProxy.cc MEM: Add port proxies instead of non-structural ports 2012-01-17 12:55:08 -06:00
RubyPortProxy.hh MEM: Add port proxies instead of non-structural ports 2012-01-17 12:55:08 -06:00
RubySystem.py Ruby: Add support for functional accesses 2011-06-30 19:49:26 -05:00
SConscript MEM: Add port proxies instead of non-structural ports 2012-01-17 12:55:08 -06:00
Sequencer.cc Ruby Sequencer: Schedule deadlock check event at correct time 2012-05-22 11:32:57 -05:00
Sequencer.hh clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
Sequencer.py rubytest: seperated read and write ports. 2012-04-06 13:47:06 -07:00
SparseMemory.cc Ruby Sparse Memory: Add function for collating blocks 2012-01-11 13:29:54 -06:00
SparseMemory.hh Ruby Sparse Memory: Add function for collating blocks 2012-01-11 13:29:54 -06:00
System.cc sim-ruby: checkpointing fixes and dependent eventq improvements 2012-04-06 13:47:07 -07:00
System.hh sim-ruby: checkpointing fixes and dependent eventq improvements 2012-04-06 13:47:07 -07:00
TBETable.hh Change interface between coherence protocols and CacheMemory 2011-01-17 18:46:16 -06:00
TimerTable.cc ruby: get rid of the Map class 2010-06-10 23:17:07 -07:00
TimerTable.hh Ruby: Ensure order-dependent iteration uses an ordered map 2012-04-12 08:35:49 -04:00
WireBuffer.cc Ruby: Add new object called WireBuffer to mimic a Wire. 2011-03-31 17:17:57 -07:00
WireBuffer.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
WireBuffer.py CacheMemory: add allocateVoid() that is == allocate() but no return value. 2011-03-31 18:20:12 -07:00