Kevin Lim 45363ea658 Have bus use the BadAddress device to handle bad addresses. The O3 CPU should be able to boot into Linux with caches on after this change. ... src/mem/bus.cc: src/mem/bus.hh: Bus now will be setup with a default responder, unless the user overrides it. This default responder should return BadAddress if no matching port is found. src/python/m5/objects/Bus.py: Bus now has a default responder for FS mode if the user doesn't override it. It returns BadAddress if no matching port is found. src/python/m5/objects/Tsunami.py: Add bad address device. Also record when the user has specified their own default responder. --HG-- extra : convert_revision : 59070477ae313ee711b2d59baa2369c9a91c5b85		2006-11-02 15:20:37 -05:00
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arch	Use ISA specific makeExtMI.	2006-11-02 13:11:38 -05:00
base	Merge zizzer.eecs.umich.edu:/bk/newmem	2006-10-27 02:34:26 -04:00
cpu	More proper handling of the ports.	2006-11-02 14:58:31 -05:00
dev	Implement device that will return BadAddress.	2006-11-02 15:18:35 -05:00
doxygen	Fix up doxygen.	2006-08-14 19:25:07 -04:00
kern	Merge zizzer.eecs.umich.edu:/bk/newmem	2006-10-23 09:44:58 -04:00
mem	Have bus use the BadAddress device to handle bad addresses. The O3 CPU should be able to boot into Linux with caches on after this change.	2006-11-02 15:20:37 -05:00
python	Have bus use the BadAddress device to handle bad addresses. The O3 CPU should be able to boot into Linux with caches on after this change.	2006-11-02 15:20:37 -05:00
sim	remove connectAll() and connect() code since it isn't used anymore. (The python does it all)	2006-10-31 13:23:49 -05:00
unittest	Merge iceaxe.:/Volumes/work/research/m5/head	2006-06-11 22:01:34 -04:00
Doxyfile	Fix up doxygen.	2006-08-14 19:25:07 -04:00
SConscript	remove intel nic from SConscript	2006-10-28 13:16:53 -04:00