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gem5/src/cpu/inorder
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Andreas Sandberg 2cfe62adc4 cpu: Rename defer_registration->switched_out 
The defer_registration parameter is used to prevent a CPU from
initializing at startup, leaving it in the "switched out" mode. The
name of this parameter (and the help string) is confusing. This patch
renames it to switched_out, which should be more descriptive.
2013-01-07 13:05:45 -05:00
..
resources cpu: Remove unused params.hh header file in inorder CPU 2013-01-07 13:05:45 -05:00
comm.hh Faults: Turn off arch/faults.hh 2012-02-07 04:43:21 -08:00
cpu.cc cpu: Rename defer_registration->switched_out 2013-01-07 13:05:45 -05:00
cpu.hh cpu: Rename defer_registration->switched_out 2013-01-07 13:05:45 -05:00
first_stage.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
first_stage.hh cpu: Remove unused params.hh header file in inorder CPU 2013-01-07 13:05:45 -05:00
inorder_cpu_builder.cc SE/FS: Get rid of FULL_SYSTEM in the CPU directory. 2011-11-18 01:33:28 -08:00
inorder_dyn_inst.cc cpu: rename the misleading inSyscall to noSquashFromTC 2013-01-07 13:05:33 -05:00
inorder_dyn_inst.hh sim: Remove FastAlloc 2012-06-05 01:23:08 -04:00
inorder_trace.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
inorder_trace.hh Make commenting on close namespace brackets consistent. 2011-01-03 14:35:43 -08:00
InOrderCPU.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
InOrderTrace.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
pipeline_stage.cc Clock: Add a Cycles wrapper class and use where applicable 2012-08-28 14:30:33 -04:00
pipeline_stage.hh inorder: implement trap handling 2011-06-19 21:43:36 -04:00
pipeline_traits.5stage.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
pipeline_traits.5stage.hh cpu: Remove unused params.hh header file in inorder CPU 2013-01-07 13:05:45 -05:00
pipeline_traits.9stage.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
pipeline_traits.9stage.hh cpu: Remove unused params.hh header file in inorder CPU 2013-01-07 13:05:45 -05:00
pipeline_traits.9stage.smt2.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
pipeline_traits.9stage.smt2.hh cpu: Remove unused params.hh header file in inorder CPU 2013-01-07 13:05:45 -05:00
pipeline_traits.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
reg_dep_map.cc inorder: clear reg. dep entry after removing from list 2011-06-19 21:43:42 -04:00
reg_dep_map.hh imported patch squash_from_next_stage 2011-06-19 21:43:36 -04:00
resource.cc Clock: Add a Cycles wrapper class and use where applicable 2012-08-28 14:30:33 -04:00
resource.hh Clock: Add a Cycles wrapper class and use where applicable 2012-08-28 14:30:33 -04:00
resource_pool.9stage.cc CPU: Round-two unifying instr/data CPU ports across models 2012-02-24 11:42:00 -05:00
resource_pool.cc Clock: Add a Cycles wrapper class and use where applicable 2012-08-28 14:30:33 -04:00
resource_pool.hh cpu: Remove unused params.hh header file in inorder CPU 2013-01-07 13:05:45 -05:00
resource_sked.cc inorder: addtl functionaly for inst. skeds 2011-06-19 21:43:35 -04:00
resource_sked.hh inorder: addtl functionaly for inst. skeds 2011-06-19 21:43:35 -04:00
SConscript inorder: stall stores on store conditionals & compare/swaps 2011-06-19 21:43:39 -04:00
SConsopts cpu_models: get rid of cpu_models.py and move the stuff into SCons 2010-02-26 18:14:48 -08:00
thread_context.cc cpu: Unify SimpleCPU and O3 CPU serialization code 2013-01-07 13:05:44 -05:00
thread_context.hh cpu: Unify SimpleCPU and O3 CPU serialization code 2013-01-07 13:05:44 -05:00
thread_state.cc SE/FS: Make the functions available from the TC consistent between SE and FS. 2011-10-31 02:58:22 -07:00
thread_state.hh cpu: rename the misleading inSyscall to noSquashFromTC 2013-01-07 13:05:33 -05:00