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Kevin Lim 21df09cf7a Fixes for ozone CPU to successfully boot and run linux.
cpu/base_dyn_inst.hh:
    Remove snoop function (did not mean to commit it).
cpu/ozone/back_end_impl.hh:
    Set instruction as having its result ready, not completed.
cpu/ozone/cpu.hh:
    Fixes for store conditionals.  Use an additional lock addr list to make sure that the access is valid.  I don't know if this is fully necessary, but it gives me a peace of mind (at some performance cost).
    Make sure to schedule for cycles(1) and not just 1 cycle in the future as tick = 1ps.
    Also support the new Checker.
cpu/ozone/cpu_builder.cc:
    Add parameter for maxOutstandingMemOps so it can be set through the config.
    Also add in the checker.  Right now it's a BaseCPU simobject, but that may change in the future.
cpu/ozone/cpu_impl.hh:
    Add support for the checker.  For now there's a dynamic cast to convert the simobject passed back from the builder to the proper Checker type.  It's ugly, but only happens at startup, and is probably a justified use of dynamic cast.

    Support switching out/taking over from other CPUs.

    Correct indexing problem for float registers.
cpu/ozone/dyn_inst.hh:
    Add ability for instructions to wait on memory instructions in addition to source register instructions.  This is needed for memory dependence predictors and memory barriers.
cpu/ozone/dyn_inst_impl.hh:
    Support waiting on memory operations.
    Use "resultReady" to differentiate an instruction having its registers produced vs being totally completed.
cpu/ozone/front_end.hh:
    Support switching out.
    Also record if an interrupt is pending.
cpu/ozone/front_end_impl.hh:
    Support switching out.  Also support stalling the front end if an interrupt is pending.
cpu/ozone/lw_back_end.hh:
    Add checker in.
    Support switching out.
    Support memory barriers.
cpu/ozone/lw_back_end_impl.hh:
    Lots of changes to get things to work right.
    Faults, traps, interrupts all wait until all stores have written back (important).
    Memory barriers are supported, as is the general ability for instructions to be dependent on other memory instructions.
cpu/ozone/lw_lsq.hh:
    Support switching out.
    Also use store writeback events in all cases, not just dcache misses.
cpu/ozone/lw_lsq_impl.hh:
    Support switching out.
    Also use store writeback events in all cases, not just dcache misses.
    Support the checker CPU.  Marks instructions as completed once the functional access is done (which has to be done for the checker to be able to verify results).
cpu/ozone/simple_params.hh:
    Add max outstanding mem ops parameter.
python/m5/objects/OzoneCPU.py:
    Add max outstanding mem ops, checker.

--HG--
extra : convert_revision : f4d408e1bb1f25836a097b6abe3856111e950c59
2006-05-11 19:18:36 -04:00
arch Updates for O3 model. 2006-04-22 18:26:48 -04:00
base Updates for O3 model. 2006-04-22 18:26:48 -04:00
build Updates for OzoneCPU. 2006-04-22 18:45:01 -04:00
configs Add support for multiple streams being configured with the INITPARAM 2005-11-29 18:06:15 -05:00
cpu Fixes for ozone CPU to successfully boot and run linux. 2006-05-11 19:18:36 -04:00
dev Add some basic statistics to the disk model 2006-03-29 14:27:10 -05:00
docs Many files: 2005-06-05 05:16:00 -04:00
encumbered/cpu/full Many files: 2005-06-05 05:16:00 -04:00
kern Merge ktlim@zizzer:/bk/m5 2006-03-07 20:01:34 -05:00
mem Don't forget to check in the needed header file for the conditional prefetch building. 2006-03-16 11:34:19 -05:00
python Fixes for ozone CPU to successfully boot and run linux. 2006-05-11 19:18:36 -04:00
sim Don't access init_regs directly. This does not affect newmem; Steve already changed this in newmem. 2006-03-15 15:38:14 -05:00
test Minor fix for test/genini.py. 2005-10-31 22:41:14 -05:00
util Add quiesceNs, quiesceTime, quiesceCycles, and m5panic pseudo ops. 2006-02-28 18:41:04 -05:00
Doxyfile Fix minor doxygen issues. 2005-06-05 08:08:29 -04:00
LICENSE Fix a few broken or inconsistently formatted copyrights 2005-06-05 05:08:37 -04:00
README More documentation for 1.1 release. 2005-10-06 13:59:05 -04:00
RELEASE_NOTES More documentation for 1.1 release. 2005-10-06 13:59:05 -04:00
SConscript Use dwarf-2 debugging symbols (they work much better). 2006-04-24 16:55:31 -04:00

This is release m5_1.1 of the M5 simulator.

This file contains brief "getting started" instructions.  For more
information, see http://m5.eecs.umich.edu.  If you have questions,
please send mail to m5sim-users@lists.sourceforge.net.

WHAT'S INCLUDED (AND NOT)
-------------------------

The basic source release includes these subdirectories:
 - m5: the simulator itself
 - m5-test: regression tests
 - ext: less-common external packages needed to build m5
 - alpha-system: source for Alpha console and PALcode

To run full-system simulations, you will need compiled console,
PALcode, and kernel binaries and one or more disk images.  These files
are collected in a separate archive, m5_system_1.1.tar.bz2.  This file
is included on the CD release, or you can download it separately from
Sourceforge.

M5 supports Linux 2.4/2.6, FreeBSD, and the proprietary Compaq/HP
Tru64 version of Unix. We are able to distribute Linux and FreeBSD
bootdisks, but we are unable to distribute bootable disk images of
Tru64 Unix. If you have a Tru64 license and are interested in
obtaining disk images, contact us at m5-dev@eecs.umich.edu.

The CD release includes a few extra goodies, such as a tar file
containing doxygen-generated HTML documentation (html-docs.tar.gz), a
set of Linux source patches (linux_m5-2.6.8.1.diff), and the scons
program needed to build M5.  If you do not have the CD, the same HTML
documentation is available online at http://m5.eecs.umich.edu/docs,
the Linux source patches are available at
http://m5.eecs.umich.edu/dist/linux_m5-2.6.8.1.diff, and the scons
program is available from http://www.scons.org.

WHAT'S NEEDED
-------------
- GCC version 3.3 or newer
- Python 2.3 or newer
- SCons 0.96.1 or newer (see http://www.scons.org)

WHAT'S RECOMMENDED
------------------
- MySQL (for statistics complex statistics storage/retrieval)
- Python-MysqlDB (for statistics analysis) 

GETTING STARTED
---------------

There are two different build targets and three optimizations levels:

Target:
-------
ALPHA_SE - Syscall emulation simulation
ALPHA_FS - Full system simulation

Optimization:
-------------
m5.debug - debug version of the code with tracing and without optimization
m5.opt   - optimized version of code with tracing
m5.fast  - optimized version of the code without tracing and asserts

Different targets are built in different subdirectories of m5/build.
Binaries with the same target but different optimization levels share
the same directory.  Note that you can build m5 in any directory you
choose;p just configure the target directory using the 'mkbuilddir'
script in m5/build.

The following steps will build and test the simulator.  The variable
"$top" refers to the top directory where you've unpacked the files,
i.e., the one containing the m5, m5-test, and ext directories.  If you
have a multiprocessor system, you should give scons a "-j N" argument (like
make) to run N jobs in parallel.

To build and test the syscall-emulation simulator:

	cd $top/m5/build
	scons ALPHA_SE/test/opt/quick

This process takes under 10 minutes on a dual 3GHz Xeon system (using
the '-j 4' option).

To build and test the full-system simulator:

1. Unpack the full-system binaries from m5_system_1.1.tar.bz2.  (See
   above for directions on obtaining this file if you don't have it.)
   This package includes disk images and kernel, palcode, and console
   binaries for Linux and FreeBSD.
2. Edit the SYSTEMDIR search path in $top/m5-test/SysPaths.py to
   include the path to your local copy of the binaries.
3. In $top/m5/build, run "scons ALPHA_FS/test/opt/quick".

This process also takes under 10 minutes on a dual 3GHz Xeon system
(again using the '-j 4' option).