gem5/src/arch/arm/isa
2011-01-18 16:30:02 -06:00
..
decoder ARM: Add support for M5 ops in the ARM ISA 2010-11-08 13:58:24 -06:00
formats ARM: Return an FailUnimp instruction when an unimplemented CP15 register is accessed. 2010-11-15 14:04:04 -06:00
insts ARM: Add support for moving predicated false dest operands from sources. 2011-01-18 16:30:02 -06:00
templates ARM: Add support for moving predicated false dest operands from sources. 2011-01-18 16:30:02 -06:00
bitfields.isa ARM: Rearrange the load/store double/exclusive, table branch thumb decoding. 2010-06-02 12:58:07 -05:00
copyright.txt ARM: Remove IsControl from operands that don't imply control transfers. 2010-06-02 12:57:59 -05:00
includes.isa ARM: Add support for M5 ops in the ARM ISA 2010-11-08 13:58:24 -06:00
main.isa ARM: Define the load instructions from outside the decoder. 2010-06-02 12:58:01 -05:00
operands.isa ARM: Take advantage of new PCState syntax. 2010-12-09 14:45:17 -08:00