gem5/configs/common
Erfan Azarkhish 100cbc9cf6 mem: hmc: top level design
This patch enables modeling a complete Hybrid Memory Cube (HMC) device. It
highly reuses the existing components in gem5's general memory system with some
small modifications. This changeset requires additional patches to model a
complete HMC device.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2015-11-03 12:17:56 -06:00
..
Benchmarks.py config: Specify OS type and release on command line 2015-03-19 04:06:14 -04:00
CacheConfig.py mem: Allow read-only caches and check compliance 2015-07-03 10:14:39 -04:00
Caches.py mem: Add explicit Cache subclass and make BaseCache abstract 2015-08-21 07:03:23 -04:00
cpu2000.py arm: Add support for ARMv8 (AArch64 & AArch32) 2014-01-24 15:29:34 -06:00
CpuConfig.py kvm, arm: Add support for aarch64 2015-06-01 19:44:19 +01:00
FSConfig.py sparc: add missing parameter to makeSparcSystem() 2015-11-03 12:17:55 -06:00
HMC.py mem: hmc: top level design 2015-11-03 12:17:56 -06:00
MemConfig.py mem: hmc: top level design 2015-11-03 12:17:56 -06:00
O3_ARM_v7a.py mem: Add explicit Cache subclass and make BaseCache abstract 2015-08-21 07:03:23 -04:00
Options.py misc: Coupling gem5 with SystemC TLM2.0 2015-08-03 23:08:40 -05:00
SimpleOpts.py config: Add configs scripts used in Learning gem5 2015-09-16 09:35:36 -05:00
Simulation.py config, cpu: fix progress interval for switched CPUs 2015-04-14 11:01:10 -05:00
SysPaths.py config: expand '~' and '~user' in paths 2015-03-23 16:14:19 -07:00