gem5/tests/long/se/70.twolf/ref/x86/linux/simple-timing
Andreas Hansson 8909843a76 stats: Update stats to reflect cache and interconnect changes
This is a bulk update of stats to match the changes to cache timing,
interconnect timing, and a few minor changes to the o3 CPU.
2015-03-02 05:04:20 -05:00
..
config.ini stats: changes due to recent changesets. 2015-01-10 18:06:43 -06:00
simerr stats: update stats for cache occupancy and clock domain changes 2014-01-24 15:29:33 -06:00
simout stats: update stats for cache occupancy and clock domain changes 2014-01-24 15:29:33 -06:00
smred.out SE/FS: Make both SE and FS tests available all the time. 2012-01-28 07:24:45 -08:00
smred.pin SE/FS: Make both SE and FS tests available all the time. 2012-01-28 07:24:45 -08:00
smred.pl1 SE/FS: Make both SE and FS tests available all the time. 2012-01-28 07:24:45 -08:00
smred.pl2 SE/FS: Make both SE and FS tests available all the time. 2012-01-28 07:24:45 -08:00
smred.sav SE/FS: Make both SE and FS tests available all the time. 2012-01-28 07:24:45 -08:00
smred.sv2 SE/FS: Make both SE and FS tests available all the time. 2012-01-28 07:24:45 -08:00
smred.twf SE/FS: Make both SE and FS tests available all the time. 2012-01-28 07:24:45 -08:00
stats.txt stats: Update stats to reflect cache and interconnect changes 2015-03-02 05:04:20 -05:00