gem5/tests/long/se/60.bzip2/ref/arm/linux/simple-timing
Andreas Hansson 8909843a76 stats: Update stats to reflect cache and interconnect changes
This is a bulk update of stats to match the changes to cache timing,
interconnect timing, and a few minor changes to the o3 CPU.
2015-03-02 05:04:20 -05:00
..
config.ini stats: updates due to changes to x86, stale configs. 2014-10-11 16:18:51 -05:00
simerr stats: update stats for cache occupancy and clock domain changes 2014-01-24 15:29:33 -06:00
simout stats: update stats for ARMv8 changes 2014-01-24 15:29:34 -06:00
stats.txt stats: Update stats to reflect cache and interconnect changes 2015-03-02 05:04:20 -05:00