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gem5/src/mem/ruby/structures
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David Guillen Fandos 70798b1ba0 stats: Fixing regStats function for some SimObjects 
Fixing an issue with regStats not calling the parent class method
for most SimObjects in Gem5. This causes issues if one adds new
stats in the base class (since they are never initialized properly!).

Change-Id: Iebc5aa66f58816ef4295dc8e48a357558d76a77c
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-06-06 17:16:43 +01:00
..
AbstractReplacementPolicy.cc style: fix missing spaces in control statements 2016-02-06 17:21:19 -08:00
AbstractReplacementPolicy.hh ruby: eliminate type uint64 and int64 2015-08-29 10:19:23 -05:00
BankedArray.cc style: fix missing spaces in control statements 2016-02-06 17:21:19 -08:00
BankedArray.hh ruby: rename System.{hh,cc} to RubySystem.{hh,cc} 2015-09-16 12:03:03 -04:00
CacheMemory.cc stats: Fixing regStats function for some SimObjects 2016-06-06 17:16:43 +01:00
CacheMemory.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
DirectoryMemory.cc ruby: print addresses in hex 2015-09-18 13:27:47 -05:00
DirectoryMemory.hh ruby: directory memory: drop unused variable. 2015-09-01 15:50:32 -05:00
DirectoryMemory.py ruby: interface with classic memory controller 2014-11-06 05:42:21 -06:00
LRUPolicy.cc ruby: eliminate type uint64 and int64 2015-08-29 10:19:23 -05:00
LRUPolicy.hh ruby: eliminate type uint64 and int64 2015-08-29 10:19:23 -05:00
LRUReplacementPolicy.py ruby: initialize replacement policies with their own simobjs 2015-07-20 09:15:18 -05:00
MemoryNode.cc ruby: interface with classic memory controller 2014-11-06 05:42:21 -06:00
MemoryNode.hh ruby: replace Address by Addr 2015-08-14 12:04:51 -05:00
PerfectCacheMemory.hh misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
PersistentTable.cc ruby: replace Address by Addr 2015-08-14 12:04:51 -05:00
PersistentTable.hh misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
Prefetcher.cc stats: Fixing regStats function for some SimObjects 2016-06-06 17:16:43 +01:00
Prefetcher.hh ruby: rename System.{hh,cc} to RubySystem.{hh,cc} 2015-09-16 12:03:03 -04:00
PseudoLRUPolicy.cc style: fix missing spaces in control statements 2016-02-06 17:21:19 -08:00
PseudoLRUPolicy.hh ruby: eliminate type uint64 and int64 2015-08-29 10:19:23 -05:00
PseudoLRUReplacementPolicy.py ruby: initialize replacement policies with their own simobjs 2015-07-20 09:15:18 -05:00
ReplacementPolicy.py ruby: initialize replacement policies with their own simobjs 2015-07-20 09:15:18 -05:00
RubyCache.py gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
RubyMemoryControl.cc style: fix missing spaces in control statements 2016-02-06 17:21:19 -08:00
RubyMemoryControl.hh scons: Enable -Wextra by default 2016-01-11 05:52:20 -05:00
RubyMemoryControl.py ruby: interface with classic memory controller 2014-11-06 05:42:21 -06:00
RubyPrefetcher.py mem: Dynamically determine page bytes in memory components 2014-10-16 05:49:43 -04:00
SConscript ruby: Move Rubys cache class from Cache.py to RubyCache.py 2015-08-21 07:03:21 -04:00
TBETable.hh style: fix missing spaces in control statements 2016-02-06 17:21:19 -08:00
TimerTable.cc ruby: message buffer, timer table: significant changes 2015-09-16 11:59:56 -05:00
TimerTable.hh ruby: message buffer, timer table: significant changes 2015-09-16 11:59:56 -05:00
WireBuffer.cc ruby: update WireBuffer API to match that of MessageBuffer 2015-09-17 14:00:33 -04:00
WireBuffer.hh ruby: update WireBuffer API to match that of MessageBuffer 2015-09-17 14:00:33 -04:00
WireBuffer.py ruby: replace global g_system_ptr with per-object pointers 2015-07-10 16:05:23 -05:00