gem5/src/mem/protocol
Sooraj Puthoor 29d38e7576 ruby: init MessageSizeType of SequencerMsg to Request_Control
SequencerMsg is autogenerated by slicc scripts and the MessageSizeType is
initialized to the max enume value by default. The DMASequencer pushes this
message to the mandatory queue and since the MessageSizeType is unitialized,
string_to_MessageSizeType() function used by traces to print the message fails
with a panic. This patch avoids this problem by initializing MessageSizeType
of SequencerMsg to Request_Control.
2016-11-19 12:39:04 -05:00
..
Garnet_standalone-cache.sm ruby: rename ALPHA_Network_test protocol to Garnet_standalone. 2016-10-06 14:35:14 -04:00
Garnet_standalone-dir.sm ruby: rename ALPHA_Network_test protocol to Garnet_standalone. 2016-10-06 14:35:14 -04:00
Garnet_standalone-msg.sm ruby: rename ALPHA_Network_test protocol to Garnet_standalone. 2016-10-06 14:35:14 -04:00
Garnet_standalone.slicc ruby: rename ALPHA_Network_test protocol to Garnet_standalone. 2016-10-06 14:35:14 -04:00
GPU_RfO-SQC.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
GPU_RfO-TCC.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
GPU_RfO-TCCdir.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
GPU_RfO-TCP.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
GPU_RfO.slicc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
GPU_VIPER-SQC.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
GPU_VIPER-TCC.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
GPU_VIPER-TCP.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
GPU_VIPER.slicc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
GPU_VIPER_Baseline.slicc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
GPU_VIPER_Region-TCC.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
GPU_VIPER_Region.slicc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
MESI_Three_Level-L0cache.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MESI_Three_Level-L1cache.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MESI_Three_Level-msg.sm ruby: replace Address by Addr 2015-08-14 12:04:51 -05:00
MESI_Three_Level.slicc ruby: mesi three level: rename incorrectly named files 2014-02-20 17:27:17 -06:00
MESI_Two_Level-dir.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MESI_Two_Level-dma.sm ruby: Allow multiple outstanding DMA requests 2016-10-26 22:48:37 -04:00
MESI_Two_Level-L1cache.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MESI_Two_Level-L2cache.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MESI_Two_Level-msg.sm ruby: replace Address by Addr 2015-08-14 12:04:51 -05:00
MESI_Two_Level.slicc ruby: rename MESI_CMP_directory to MESI_Two_Level 2014-01-04 00:03:33 -06:00
MI_example-cache.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MI_example-dir.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MI_example-dma.sm ruby: Allow multiple outstanding DMA requests 2016-10-26 22:48:37 -04:00
MI_example-msg.sm ruby: replace Address by Addr 2015-08-14 12:04:51 -05:00
MI_example.slicc Protocol: Remove standard one and two level files 2011-11-03 22:52:02 -05:00
MOESI_AMD_Base-CorePair.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
MOESI_AMD_Base-dir.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
MOESI_AMD_Base-L3cache.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
MOESI_AMD_Base-msg.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
MOESI_AMD_Base-probeFilter.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
MOESI_AMD_Base-Region-CorePair.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
MOESI_AMD_Base-Region-dir.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
MOESI_AMD_Base-Region-msg.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
MOESI_AMD_Base-RegionBuffer.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
MOESI_AMD_Base-RegionDir.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
MOESI_AMD_Base.slicc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
MOESI_CMP_directory-dir.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MOESI_CMP_directory-dma.sm ruby: Allow multiple outstanding DMA requests 2016-10-26 22:48:37 -04:00
MOESI_CMP_directory-L1cache.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MOESI_CMP_directory-L2cache.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MOESI_CMP_directory-msg.sm ruby: replace Address by Addr 2015-08-14 12:04:51 -05:00
MOESI_CMP_directory.slicc ruby: record fully busy cycle with in the controller 2013-02-10 21:26:22 -06:00
MOESI_CMP_token-dir.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MOESI_CMP_token-dma.sm ruby: Allow multiple outstanding DMA requests 2016-10-26 22:48:37 -04:00
MOESI_CMP_token-L1cache.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MOESI_CMP_token-L2cache.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MOESI_CMP_token-msg.sm ruby: replace Address by Addr 2015-08-14 12:04:51 -05:00
MOESI_CMP_token.slicc Protocol: Remove standard one and two level files 2011-11-03 22:52:02 -05:00
MOESI_hammer-cache.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MOESI_hammer-dir.sm ruby: slicc: have a static MachineType 2015-07-20 09:15:18 -05:00
MOESI_hammer-dma.sm ruby: Allow multiple outstanding DMA requests 2016-10-26 22:48:37 -04:00
MOESI_hammer-msg.sm ruby: replace Address by Addr 2015-08-14 12:04:51 -05:00
MOESI_hammer.slicc Protocol: Remove standard one and two level files 2011-11-03 22:52:02 -05:00
RubySlicc_ComponentMapping.sm gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
RubySlicc_Defines.sm ruby: message buffer, timer table: significant changes 2015-09-16 11:59:56 -05:00
RubySlicc_Exports.sm ruby: init MessageSizeType of SequencerMsg to Request_Control 2016-11-19 12:39:04 -05:00
RubySlicc_interfaces.slicc ruby: remove the three files related to profiling 2013-06-24 08:59:08 -05:00
RubySlicc_MemControl.sm ruby: replace Address by Addr 2015-08-14 12:04:51 -05:00
RubySlicc_Types.sm ruby: Allow multiple outstanding DMA requests 2016-10-26 22:48:37 -04:00
RubySlicc_Util.sm slicc: fixes for the Address to Addr changeset (11025) 2015-11-13 17:30:58 -05:00
SConscript Ruby: Modify Scons so that we can put .sm files in extras 2012-09-12 14:52:04 -05:00
SConsopts ruby: rename ALPHA_Network_test protocol to Garnet_standalone. 2016-10-06 14:35:14 -04:00