Commit graph

534 commits

Author SHA1 Message Date
Andreas Hansson
c9b8616c51 base: Do not dereference NULL in CompoundFlag creation
This patch fixes the CompoundFlag constructor, ensuring that it does
not dereference NULL. Doing so has undefined behaviuor, and both clang
and gcc's undefined-behaviour sanitiser was rather unhappy.
2015-02-11 10:23:23 -05:00
Curtis Dunham
f0a764edc6 base: add an accessor and operators ==,!= to address ranges 2015-02-03 14:25:58 -05:00
Andreas Hansson
ccb512ecc1 base: Add XOR-based hashed address interleaving
This patch extends the current address interleaving with basic hashing
support. Instead of directly comparing a number of address bits with a
matching value, it is now possible to use two independent set of
address bits XOR'ed together. This avoids issues where strided address
patterns are heavily biased to a subset of the interleaved ranges.
2015-02-03 14:25:54 -05:00
Gabe Black
86dea86987 base: Fix assigning between identical bitfields.
If two bitfields are of the same type, also implying that they have the same
first and last bit positions, the existing implementation would copy the
entire bitfield. That includes the __data member which is shared among all the
bitfields, effectively overwritting the entire bitunion.

This change also adjusts the write only signed bitfield assignment operator to
be like the unsigned version, using "using" instead of implementing it again
and calling down to the underlying implementation.
2015-01-07 00:31:46 -08:00
Gabe Black
4a8a0a0798 misc: Generalize GDB single stepping.
The new single stepping implementation for x86 doesn't rely on any ISA
specific properties or functionality. This change pulls out the per ISA
implementation of those functions and promotes the X86 implementation to the
base class.

One drawback of that implementation is that the CPU might stop on an
instruction twice if it's affected by both breakpoints and single stepping.
While that might be a little surprising, it's harmless and would only happen
under somewhat unlikely circumstances.
2014-12-05 22:37:03 -08:00
Gabe Black
16c9b41616 misc: Add some utility functions for schedule inst commit events.
These can be used to simplify the implementation of single step in derived
classes.
2014-12-05 22:35:47 -08:00
Gabe Black
cddf988bfd misc: Rename the GDB "Event" event class to InputEvent.
The "Event" name is the same as the base event class. That's a bit confusing,
and makes it a little awkward to add other event types.
2014-12-05 22:34:42 -08:00
Gabe Black
f9f46b8fa9 sim: Ensure GDB interrupts the simulation at an instruction boundary.
Use the comInstEventQueue to ensure GDB interrupts the simulation at an
instruction boundary and not in the middle of a macroop, memory access, etc.
2014-12-05 01:51:49 -08:00
Gabe Black
fe48c0a32b misc: Make the GDB register cache accessible in various sized chunks.
Not all ISAs have 64 bit sized registers, so it's not always very convenient
to access the GDB register cache in 64 bit sized chunks. This change makes it
accessible in 8, 16, 32, or 64 bit chunks. The MIPS and ARM implementations
were working around that limitation by bundling and unbundling 32 bit values
into 64 bit values. That code has been removed.
2014-12-05 01:44:24 -08:00
Gabe Black
2d9dae01fb sim: Make it possible to override the breakpoint length check.
The check which makes sure the length of the breakpoint being written is the
same as a MachInst is only correct on fixed instruction width ISAs. Instead of
incorrectly applying that check to all ISAs, this change makes that the
default check and lets ISA specific GDB classes override it.
2014-12-03 03:27:19 -08:00
Andreas Hansson
d66b14ca61 misc: Another round of static analysis fixups
Mostly addressing uninitialised members.
2014-11-24 09:03:38 -05:00
Gabe Black
a08cfd797b vnc: Add a conversion function for bgr888. 2014-11-17 01:45:42 -08:00
Andreas Hansson
481eb6ae80 arm: Fixes based on UBSan and static analysis
Another churn to clean up undefined behaviour, mostly ARM, but some
parts also touching the generic part of the code base.

Most of the fixes are simply ensuring that proper intialisation. One
of the more subtle changes is the return type of the sign-extension,
which is changed to uint64_t. This is to avoid shifting negative
values (undefined behaviour) in the ISA code.
2014-11-14 03:53:51 -05:00
Andreas Hansson
cc336ecb5e base: Revert 9277177eccff and use getenv/setenv for UTC time
This patch reverts changeset 9277177eccff which does not do what it
was intended to do. In essence, we go back to implementing mkutctime
much like the non-standard timegm extension.
2014-11-12 09:05:20 -05:00
Ali Saidi
baf88e908d arm: Fix multi-system AArch64 boot w/caches.
Automatically extract cpu release address from DTB file.
Check SCTLR_EL1 to verify all caches are enabled.
2014-10-29 23:18:26 -05:00
Andreas Hansson
6290f98194 misc: Use gmtime for conversion to UTC to avoid getenv/setenv
This patch changes how we turn time into UTC. Previously we
manipulated the TZ environment variable, but this has issues as the
strings that are manipulated could be tainted (see e.g. CERT
ENV34-C). Now we simply rely on the built-in gmtime function and avoid
touching getenv/setenv all together.
2014-10-20 18:03:55 -04:00
Andreas Hansson
77f8f5d94c base: Fix for stats node on gcc < 4.6.3
This patch adds an explicit function to get the underlying node as gcc
4.6.1 and 4.6.2 have issues otherwise.
2014-10-20 18:03:54 -04:00
Andreas Hansson
edc77fc03c misc: Move AddrRangeList from port.hh to addr_range.hh
The new location seems like a better fit. The iterator typedefs are
removed in favour of using C++11 auto.
2014-10-16 05:49:59 -04:00
Andreas Hansson
e2a13386e5 sim: EventQueue wakeup on events scheduled outside the event loop
This patch adds a 'wakeup' member function to EventQueue which should be
called on an event queue whenever an event is scheduled on the event queue
from outside code within the call tree of the gem5 event loop.

This clearly isn't necessary for normal gem5 EventQueue operation but
becomes the minimum necessary interface to allow hosting gem5's event loop
onto other schedulers where there may be calls into gem5 from external
code which schedules events onto an EventQueue between the current time and
the time of the next scheduled event.

The use case I have in mind is a SystemC hosting where the event loop is:

    while (more events) {
        wait(time_to_next_event or wakeup)
        setCurTick
        service events at this time
    }

where the 'wait' needs to be woken up if time_to_next_event becomes shorter
due to a scheduled event from SystemC arriving in a gem5 object.

Requiring 'wakeup' to be called is a more efficient interface than
requiring all gem5 event scheduling actions to affect the host scheduler.

This interface could be located elsewhere, say on another global object,
or by being passed by the host scheduler to objects which will schedule
such events, but it seems cleanest to put it on EventQueue as it is
actually a signal to the queue.

EventQueue::wakeup is called for async_event events on event queue 0 as
it's only important that *some* queue be triggered for such events.
2014-10-16 05:49:53 -04:00
Andrew Bardsley
960935a5bd base: Reimplement the DPRINTF mechanism in a Logger class
This patch adds a Logger class encapsulating dprintf.  This allows
variants of DPRINTF logging to be constructed and substituted in
place of the default behaviour.

The Logger provides a logMessage(when, name, format, ...) member
function like Trace::dprintf and a getOstream member function to
use a raw ostream for logging.

A class OstreamLogger is provided which generates the customary
debugging output with Trace::OstreamLogger::logMessage being the
old Trace::dprintf.
2014-10-16 05:49:53 -04:00
Andreas Hansson
a2d246b6b8 arch: Use shared_ptr for all Faults
This patch takes quite a large step in transitioning from the ad-hoc
RefCountingPtr to the c++11 shared_ptr by adopting its use for all
Faults. There are no changes in behaviour, and the code modifications
are mostly just replacing "new" with "make_shared".
2014-10-16 05:49:51 -04:00
Andreas Hansson
acdfcad30d base: Use shared_ptr for stat Node
This patch transitions the stat Node and its derived classes from
the ad-hoc RefCountingPtr to the c++11 shared_ptr. There are no
changes in behaviour, and the code modifications are mainly replacing
"new" with "make_shared".
2014-10-16 05:49:48 -04:00
Andreas Hansson
8b789ae451 base: Transition CP annotate to use shared_ptr 2014-10-16 05:49:47 -04:00
Andreas Hansson
ad3f75dc81 dev: Use shared_ptr for EthPacketData
This patch transitions the EthPacketData from the ad-hoc
RefCountingPtr to the c++11 shared_ptr. There are no changes in
behaviour, and the code modifications are mainly replacing "new" with
"make_shared".

The bool casting operator for the shared_ptr is explicit, and we must
therefore either cast it, compare it to NULL (p != nullptr), double
negate it (!!p) or do a (p ? true : false).
2014-10-16 05:49:46 -04:00
Andrew Bardsley
d8502ee46d config: Add a --without-python option to build process
Add the ability to build libgem5 without embedded Python or the
ability to configure with Python.

This is a prelude to a patch to allow config.ini files to be loaded
into libgem5 using only C++ which would make embedding gem5 within
other simulation systems easier.

This adds a few registration interfaces to things which cross
between Python and C++.  Namely: stats dumping and SimObject resolving
2014-10-16 05:49:32 -04:00
Nilay Vaish
2816521f0d base: addr range: slight change to validity check
The validity check is being changed from < to <= since the end of the range
is considered to be a part of it.
2014-10-11 15:02:22 -05:00
Nilay Vaish
a9bfea5a35 base: misc: Add missing header file. 2014-10-11 15:02:22 -05:00
Andreas Hansson
6498ccddb2 misc: Fix issues identified by static analysis
Another bunch of issues addressed.
2014-10-01 08:05:54 -04:00
Andreas Hansson
de62aedabc misc: Fix a bunch of minor issues identified by static analysis
Add some missing initialisation, and fix a handful benign resource
leaks (including some false positives).
2014-09-27 09:08:29 -04:00
Stephan Diestelhorst
fe98cb6be4 misc: Add functions for doing popcount and power-of-two checking
Adds two public domain algorithms for determining number of set bits and also
whether a value is a power of two, uses the builtin that is available in GCC
and clang for popcount.
2014-04-24 17:41:26 +01:00
Andreas Hansson
0fa128bbd0 base: Clean up redundant string functions and use C++11
This patch does a bit of housekeeping on the string helper functions
and relies on the C++11 standard library where possible. It also does
away with our custom string hash as an implementation is already part
of the standard library.
2014-09-20 17:17:49 -04:00
Andrew Bardsley
b2c2e67468 base: Add getSectionNames to IniFile
Add an accessor to IniFile to list all the sections in the file.
2014-09-20 17:17:47 -04:00
Andreas Hansson
586a219d11 base: Ensure the CP annotation compiles again
A bit of revamping to get the CP annotate functionality to compile.
2014-09-19 10:35:12 -04:00
Andreas Hansson
32c111eda4 misc: Restore ostream flags where needed
This patch ensures we adhere to the normal ostream usage rules, and
restore the flags after modifying them.
2014-09-19 10:35:09 -04:00
Andreas Hansson
addfd89dce stats: Fix flow-control bug in Vector2D printing 2014-09-19 10:35:08 -04:00
Andreas Hansson
f615c4aeb0 misc: Remove assertions ensuring unsigned values >= 0 2014-09-19 10:35:07 -04:00
Andreas Hansson
da4539dc74 misc: Fix a number of unitialised variables and members
Static analysis unearther a bunch of uninitialised variables and
members, and this patch addresses the problem. In all cases these
omissions seem benign in the end, but at least fixing them means less
false positives next time round.
2014-09-09 04:36:31 -04:00
Andreas Hansson
83a46bfc09 base: Use STL C++11 random number generation
This patch changes the random number generator from the in-house
Mersenne twister to an implementation relying entirely on C++11 STL.

The format for the checkpointing of the twister is simplified. As the
functionality was never used this should not matter. Note that this
patch does not actually make use of the checkpointing
functionality. As the random number generator is not thread safe, it
may be sensible to create one generator per thread, system, or even
object. Until this is decided the status quo is maintained in that no
generator state is part of the checkpoint.
2014-09-03 07:42:55 -04:00
Andreas Hansson
6fa8015b7f base: Add const to intmath and be more flexible with typing
This patch ensures the functions can be used on const variables.
2014-08-26 10:14:32 -04:00
Andreas Sandberg
70176fecd1 base: Replace the internal varargs stuff with C++11 constructs
We currently use our own home-baked support for type-safe variadic
functions. This is confusing and somewhat limited (e.g., cprintf only
supports a limited number of arguments). This changeset converts all
uses of our internal varargs support to use C++11 variadic macros.
2014-08-26 10:13:45 -04:00
Andreas Sandberg
f3e5fee743 base: Add compiler macros for C++11 final/override
Add the macros M5_ATTR_FINAL and M5_ATTR_OVERRIDE which are defined to
final and override respectively if supported by the compiler. This is
done to allow a smooth transition to gcc >= 4.7.
2014-08-26 10:13:33 -04:00
Andreas Sandberg
61b8d5e4e4 base: Add a static assert to check bit union ranges
If a bit field in a bit union specified as Bitfield<LSB, MSB> instead
of Bitfield<MSB, LSB> the code silently fails and the field is read as
zero. This changeset introduces a static assert that tests, at compile
time, that the bit order is correct.
2014-08-26 10:13:28 -04:00
Andreas Sandberg
eb9226317d base: Remove unused M5_PRAGMA_NORETURN
The M5_PRAGMA_NORETURN macro was only used in for
__exit_message. Since the macro only holds a stub definition and all
functions with noreturn semantics use the M5_ATTR_NORETURN, this
macros is completely redundant.
2014-08-13 06:57:27 -04:00
Andreas Sandberg
25f5a6733c cpu: Don't forward declare RefCountingPtr
RefCountingPtr is sometimes forward declared to avoid having to
include refcnt.hh. This does not work since we typically return
instances of RefCountingPtr rather than references to instances. The
only reason this currently works is that we include refcnt.hh in
cprintf.hh, which "leaks" the header to most other source files. This
changeset replaces such forward declarations with an include of
refcnt.hh.
2014-08-13 06:57:26 -04:00
Andreas Hansson
d45ab59c29 base: Remove unused files
A bit of pruning
2014-08-10 05:38:59 -04:00
Andrew Bardsley
0e8a90f06b cpu: `Minor' in-order CPU model
This patch contains a new CPU model named `Minor'. Minor models a four
stage in-order execution pipeline (fetch lines, decompose into
macroops, decompose macroops into microops, execute).

The model was developed to support the ARM ISA but should be fixable
to support all the remaining gem5 ISAs. It currently also works for
Alpha, and regressions are included for ARM and Alpha (including Linux
boot).

Documentation for the model can be found in src/doc/inside-minor.doxygen and
its internal operations can be visualised using the Minorview tool
utils/minorview.py.

Minor was designed to be fairly simple and not to engage in a lot of
instruction annotation. As such, it currently has very few gathered
stats and may lack other gem5 features.

Minor is faster than the o3 model. Sample results:

     Benchmark     |   Stat host_seconds (s)
    ---------------+--------v--------v--------
     (on ARM, opt) | simple | o3     | minor
                   | timing | timing | timing
    ---------------+--------+--------+--------
    10.linux-boot  |   169  |  1883  |  1075
    10.mcf         |   117  |   967  |   491
    20.parser      |   668  |  6315  |  3146
    30.eon         |   542  |  3413  |  2414
    40.perlbmk     |  2339  | 20905  | 11532
    50.vortex      |   122  |  1094  |   588
    60.bzip2       |  2045  | 18061  |  9662
    70.twolf       |   207  |  2736  |  1036
2014-07-23 16:09:04 -05:00
Anthony Gutierrez
59c8c454eb base: fix operator== for comparing EthAddr objects
this operator uses memcmp() to detect if two EthAddr object have the same
address, however memcmp() will return 0 if all bytes are equal. operator==
returns the return value of memcmp() to indicate whether or not two
address are equal. this is incorrect as it will always give the opposite of
the intended behavior. this patch fixes that problem.
2014-07-09 09:28:15 -04:00
Anthony Gutierrez
3956ec0a89 base: fix some bugs in EthAddr
per the IEEE 802 spec:
1) fixed broadcast() to ensure that all bytes are equal to 0xff.
2) fixed unicast() to ensure that bit 0 of the first byte is equal to 0
3) fixed multicast() to ensure that bit 0 of the first byte is equal to 1, and
   that it is not a broadcast.

also the constructors in EthAddr are fixed so that all bytes of data are
initialized.
2014-07-02 13:19:13 -04:00
Steve Reinhardt
0be64ffe2f style: eliminate equality tests with true and false
Using '== true' in a boolean expression is totally redundant,
and using '== false' is pretty verbose (and arguably less
readable in most cases) compared to '!'.

It's somewhat of a pet peeve, perhaps, but I had some time
waiting for some tests to run and decided to clean these up.

Unfortunately, SLICC appears not to have the '!' operator,
so I had to leave the '== false' tests in the SLICC code.
2014-05-31 18:00:23 -07:00
Stephan Diestelhorst
b9e6c260a0 stats: Method stats source
This source for stats binds an object and a method / function from the object
to a stats object. This allows pulling out stats from object methods without
needing to go through a global, or static shim.

Syntax is somewhat unpleasant, but the templates and method pointer type
specification were quite tricky.  Interface is very clean though; and similar
to .functor
2014-05-09 18:58:46 -04:00
Curtis Dunham
c9071ff95e base: explicitly suggest potential use of 'All' debug flags
Without this declaration, new clangs will complain about this value
being unused. It has no explicit use in the codebase, but it can be
useful to turn on all debugging flags while in a debugger to greatly
increase simulator verbosity.
2014-04-23 05:17:59 -04:00
Andreas Sandberg
221f4f232a dev: Protect PollEvent processing when running in parallel mode
The calling thread is undefined when the PollQueue services events.
This implies that PollEvents need to handle the case where they are
processed from a different thread than the thread that created the
event. This changeset adds temporary event queue migrations to the VNC
server, the ethernet tap device, and the terminal to protect them from
inter-thread calls.
2014-04-09 16:01:43 +02:00
Andreas Hansson
5093e58dc2 base: Fix error message time unit (cycle -> tick)
This patch fixes the unit used in all error messages.
2014-03-23 11:11:32 -04:00
Stephan Diestelhorst
45677ffa97 misc: Add panic_if / fatal_if / chatty_assert
This snippet can be used to replace if + {panics, fatals, asserts} constructs.
The idea is to have both the condition checking and a verbose printout in a single statement.  The interface is as follows:

panic_if(foo != bar, "These should be equal: foo %i bar %i", foo, bar);
fatal_if(foo != bar, "These should be equal: foo %i bar %i", foo, bar);
chatty_assert(foo == bar, "These should be equal: foo %i bar %i", foo, bar);
2014-03-07 15:56:23 -05:00
Mitch Hayenga
b9a9d99b22 scons: Fixes uninitialized warnings issued by clang
Small fixes to appease recent clang versions.
2014-03-07 15:56:23 -05:00
Nilay Vaish
eb73a14fe2 base: calls abort() from fatal
Currently fatal() ends the simulation in a normal fashion.  This results in
the call stack getting lost when using a debugger and it is not always
possible to debug the simulation just from the information provided by the
printed error message.  Even though the error is likely due to a user's fault,
the information available should not be thrown away.  Hence, this patch to
call abort() from fatal().
2014-02-06 16:30:13 -06:00
Mitch Hayenga
55a4ff5f04 base: Fix race condition in the socket listen function
gem5 makes the incorrect assumption that by binding a socket, it
effectively has allocated a port. Linux only allocates ports once you call
listen on the given socket, not when you call bind.  So even if the port was
free when bind was called, another process (gem5 instance) could race in
between the bind & listen calls and steal the port. In the current code, if
the call to bind fails due to the port being in use (EADDRINUSE), gem5 retries
for a different port.  However if listen fails, gem5 just panics. The fix is
testing the return value of listen and re-trying if it was due to EADDRINUSE.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2014-01-28 18:00:51 -06:00
ARM gem5 Developers
612f8f074f arm: Add support for ARMv8 (AArch64 & AArch32)
Note: AArch64 and AArch32 interworking is not supported. If you use an AArch64
kernel you are restricted to AArch64 user-mode binaries. This will be addressed
in a later patch.

Note: Virtualization is only supported in AArch32 mode. This will also be fixed
in a later patch.

Contributors:
Giacomo Gabrielli    (TrustZone, LPAE, system-level AArch64, AArch64 NEON, validation)
Thomas Grocutt       (AArch32 Virtualization, AArch64 FP, validation)
Mbou Eyole           (AArch64 NEON, validation)
Ali Saidi            (AArch64 Linux support, code integration, validation)
Edmund Grimley-Evans (AArch64 FP)
William Wang         (AArch64 Linux support)
Rene De Jong         (AArch64 Linux support, performance opt.)
Matt Horsnell        (AArch64 MP, validation)
Matt Evans           (device models, code integration, validation)
Chris Adeniyi-Jones  (AArch64 syscall-emulation)
Prakash Ramrakhyani  (validation)
Dam Sunwoo           (validation)
Chander Sudanthi     (validation)
Stephan Diestelhorst (validation)
Andreas Hansson      (code integration, performance opt.)
Eric Van Hensbergen  (performance opt.)
Gabe Black
2014-01-24 15:29:34 -06:00
Nilay Vaish
cfe912a512 stats: add function for adding two histograms
This patch adds a function to the HistStor class for adding two histograms.
This functionality is required for Ruby.  It also adds support for printing
histograms in a single line.
2014-01-10 16:19:40 -06:00
Andreas Sandberg
c033ead992 base: Fix race in PollQueue and remove SIGALRM workaround
There is a race between enabling asynchronous IO for a file descriptor
and IO events happening on that descriptor. A SIGIO won't normally be
delivered if an event is pending when asynchronous IO is
enabled. Instead, the signal will be raised the next time there is an
event on the FD. This changeset simulates a SIGIO by setting the
async_io flag when setting up asynchronous IO for an FD. This causes
the main event loop to poll all file descriptors to check for pending
IO. As a consequence of this, the old SIGALRM hack should no longer be
needed and is therefore removed.
2013-11-29 14:36:10 +01:00
Andreas Sandberg
9c57d5b5a6 base: Clean up signal handling
The PollEvent class dynamically installs a SIGIO and SIGALRM handler
when a file handler is registered. Most signal handlers currently get
registered in the initSignals() function. This changeset moves the
SIGIO/SIGALRM handlers to initSignals() to live with the other signal
handlers. The original code installs SIGIO and SIGALRM with the
SA_RESTART option to prevent syscalls from returning EINTR. This
changeset consistently uses this flag for all signal handlers to
ensure that other signals that trigger asynchronous behavior (e.g.,
statistics dumping) do not cause undesirable EINTR returns.
2013-11-29 14:35:36 +01:00
Steve Reinhardt ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E%2C%20Ali%20Saidi%20%3CAli.Saidi%40ARM.com%3E)
de366a16f1 sim: simulate with multiple threads and event queues
This patch adds support for simulating with multiple threads, each of
which operates on an event queue.  Each sim object specifies which eventq
is would like to be on.  A custom barrier implementation is being added
using which eventqs synchronize.

The patch was tested in two different configurations:
1. ruby_network_test.py: in this simulation L1 cache controllers receive
   requests from the cpu. The requests are replied to immediately without
   any communication taking place with any other level.
2. twosys-tsunami-simple-atomic: this configuration simulates a client-server
   system which are connected by an ethernet link.

We still lack the ability to communicate using message buffers or ports. But
other things like simulation start and end, synchronizing after every quantum
are working.

Committed by: Nilay Vaish
2013-11-25 11:21:00 -06:00
Geoffrey Blake
fb0496498d base: Add support for ipv6 into inet.hh/inet.cc 2013-10-31 13:41:13 -05:00
Andreas Sandberg
c0f367e514 base: Fix a potential race in PollQueue::setupAsyncIO
There is a potential race between enabling asynchronous IO and
selecting the target for the SIGIO signal. This changeset move the
F_SETOWN call to before the F_SETFL call that enables SIGIO
delivery. This ensures that signals are always sent to the correct
process.
2013-10-07 16:03:15 +02:00
Nilay Vaish
e391fd151b stats: add operator= for DataWrapVec class
gcc/g++ 4.4.7 complained about the operator= being undefined.
This changeset adds the operator.
2013-09-09 18:52:23 -05:00
Nilay Vaish
90bfbd9793 ruby: network: convert to gem5 style stats 2013-09-06 16:21:35 -05:00
Nilay Vaish
47d113696d stats: adds a Formula operator for division 2013-09-06 16:21:29 -05:00
Andreas Hansson
19a5b68db7 arch: Resurrect the NOISA build target and rename it NULL
This patch makes it possible to once again build gem5 without any
ISA. The main purpose is to enable work around the interconnect and
memory system without having to build any CPU models or device models.

The regress script is updated to include the NULL ISA target. Currently
no regressions make use of it, but all the testers could (and perhaps
should) transition to it.

--HG--
rename : build_opts/NOISA => build_opts/NULL
rename : src/arch/noisa/SConsopts => src/arch/null/SConsopts
rename : src/arch/noisa/cpu_dummy.hh => src/arch/null/cpu_dummy.hh
rename : src/cpu/intr_control.cc => src/cpu/intr_control_noisa.cc
2013-09-04 13:22:57 -04:00
Andreas Hansson
bb1d2f3957 arch: Header clean up for NOISA resurrection
This patch is a first step to getting NOISA working again. A number of
redundant includes make life more difficult than it has to be and this
patch simply removes them. There are also some redundant forward
declarations removed.
2013-09-04 13:22:55 -04:00
Andreas Hansson
fdf6f6c4b6 scons: Enable build on OSX
This patch changes the SConscript to build gem5 with libc++ on OSX as
the conventional libstdc++ does not have the C++11 constructs that the
current code base makes use of (e.g. std::forward).

Since this was the last use of the transitional TR1, the unordered map
and set header can now be simplified as well.
2013-09-04 13:22:54 -04:00
Andreas Hansson
c57c452143 base: Fix VectorPrint initialisation
This patch changes how the initialisation of the VectorPrint struct is
done so that gcc 4.4 is happy again.
2013-08-20 11:21:26 -04:00
Sascha Bischoff
6211c24a96 stats: Fix issue when printing 2D vectors
This patch addresses an issue with the text-based stats output which
resulted in Vector2D stats being printed without subnames in the event
that one of the dimensions was of length 1.

This patch also fixes the total printing for the 2D vector. Previously
totals were printed without explicitly stating that a total was being
printed. This has been rectified in this patch.
2013-08-19 03:52:29 -04:00
Deyuan Guo
fb29dcf378 loader: Load weak symbols for function tracing 2013-07-15 18:08:57 -04:00
Andreas Hansson
997a6a4add base: Fix address range granularity calculation
This patch fixes a bug in the granularity calculation. For example, if
the high bit is 6 (counting from 0) and we have one interleaving bit,
then the granularity is now 2 ** (6 - 1 + 1) = 64.
2013-06-27 05:49:49 -04:00
Sascha Bischoff
3d19bccb93 stats: Remove printing of SparseHist total
This patch removes the printing of the SparseHist total in the
stats.txt output file. This has been removed as a sparse histogram has
no total, and therefore this was printing out the value of a
non-local, unrelated variable.
2013-06-27 05:49:49 -04:00
Nilay Vaish
f2b5b4c8cc stats: allow printing vectors on a single line
This patch adds a new flag to specify if the data values for a given vector
should be printed in one line in the stats.txt file. The default behavior
will be to print the data in multiple lines. It makes changes to print
functions to enforce this behavior.
2013-06-09 07:29:57 -05:00
Deyuan Guo ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
b54e118628 base: load weak symbols from object file
Without loading weak symbols into gem5, some function names and the given PC
cannot correspond correctly, because the binding attributes of unction names
in an ELF file are not only STB_GLOBAL or STB_LOCAL, but also STB_WEAK. This
patch adds a function for loading weak symbols.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2013-04-17 16:07:19 -05:00
Andreas Hansson
82f600e02d base: Fix address range granularity calculations
This patch fixes a bug in the address range granularity
calculations. Previously it incorrectly used the high bit to establish
the size of the regions created, when it should really be looking at
the low bit.
2013-03-07 05:55:03 -05:00
Andreas Hansson
a62afd094b scons: Fix warnings issued by clang 3.2svn (XCode 4.6)
This patch fixes the warnings that clang3.2svn emit due to the "-Wall"
flag. There is one case of an uninitialised value in the ARM neon ISA
description, and then a whole range of unused private fields that are
pruned.
2013-02-19 05:56:08 -05:00
Andreas Hansson
319443d42d scons: Add warning for missing declarations
This patch enables warnings for missing declarations. To avoid issues
with SWIG-generated code, the warning is only applied to non-SWIG
code.
2013-02-19 05:56:07 -05:00
Andreas Hansson
c10098f28b scons: Fix up numerous warnings about name shadowing
This patch address the most important name shadowing warnings (as
produced when using gcc/clang with -Wshadow). There are many
locations where constructor parameters and function parameters shadow
local variables, but these are left unchanged.
2013-02-19 05:56:06 -05:00
Andreas Hansson
f69d431ede base: Fix a bug in the address interleaving
This patch fixes a minor (but important) typo in the matching of an
address to an interleaved range.
2013-02-19 05:56:05 -05:00
Anthony Gutierrez
f7107fb795 loader: add a flattened device tree blob (dtb) object
this adds a dtb_object so the loader can load in the dtb
file for linux/android ARM kernels.
2013-02-15 18:48:59 -05:00
Nilay Vaish
7862478eef ruby: replace Time with Cycles in Message class
Concomitant changes are being committed as well, including the io operator<<
for the Cycles class.
2013-02-10 21:26:24 -06:00
Nilay Vaish
affd77ea77 base: add some mathematical operators to Cycles class 2013-02-10 21:26:23 -06:00
Andreas Hansson
406891c62a scons: Enforce gcc >= 4.4 or clang >= 2.9 and c++0x support
This patch checks that the compiler in use is either gcc >= 4.4 or
clang >= 2.9. and enables building with --std=c++0x in all cases. As a
consequence, we can tidy up the hashmap and always have static_assert
available. If anyone wants to use alternative compilers, icc for
example supports c++0x to a similar level and could be added if
needed.

This patch opens up for a more elaborate use of c++0x features that
are present in gcc 4.4 and clang 2.9, e.g. auto typed variables,
variadic templates, rvalues and move semantics, and strongly typed
enums. There will be no going back on this one...
2013-01-07 13:05:39 -05:00
Andreas Hansson
221302335b scons: Remove stale compiler options
This patch simply prunes the SUNCC and ICC compiler options as they
are both sufficiently stale that they would have to be re-written from
scratch anyhow. The patch serves to clean things up before shifting to
a build environment that enforces basic c++11 compliance as done in
the following patch.
2013-01-07 13:05:39 -05:00
Andreas Hansson
b8c2fa6ba9 base: Add support for merging of interleaved address ranges
This patch adds support for merging a vector of interleaved address
ranges into a contigous range. The functionality will be used in the
interconnect and the PhysicalMemory to transform interleaved memory
ranges to contigous ranges before passing them on.

The actual use of the merging is appearing in future patches.
2013-01-07 13:05:38 -05:00
Andreas Hansson
01c5598373 mem: Add interleaving bits to the address ranges
This patch adds support for interleaving bits for the address
ranges. What was previously just a start and end address, now has an
additional three fields, for the high bit, and number of bits to use
for interleaving, and a match value to compare against. If the number
of interleaving bits is set to zero it is effectively disabled.

A number of convenience functions are added to the range to enquire
about the interleaving, its granularity and the number of stripes it
is part of.
2013-01-07 13:05:38 -05:00
Andreas Hansson
e0d93fde99 base: Simplify the AddrRangeMap by removing unused code
This patch cleans up the AddrRangeMap in preparation for the addition
of interleaving by removing unused code. The non-const editions of
find are never used, and hence the duplication is not needed.
2013-01-07 13:05:38 -05:00
Andreas Hansson
71da1d2157 base: Encapsulate the underlying fields in AddrRange
This patch makes the start and end address private in a move to
prevent direct manipulation and matching of ranges based on these
fields. This is done so that a transition to ranges with interleaving
support is possible.

As a result of hiding the start and end, a number of member functions
are needed to perform the comparisons and manipulations that
previously took place directly on the members. An accessor function is
provided for the start address, and a function is added to test if an
address is within a range. As a result of the latter the != and ==
operator is also removed in favour of the member function. A member
function that returns a string representation is also created to allow
debug printing.

In general, this patch does not add any functionality, but it does
take us closer to a situation where interleaving (and more cleverness)
can be added under the bonnet without exposing it to the user. More on
that in a later patch.
2013-01-07 13:05:38 -05:00
Andreas Hansson
f456c7983d mem: Add tracing support in the communication monitor
This patch adds packet tracing to the communication monitor using a
protobuf as the mechanism for creating the trace.

If no file is specified, then the tracing is disabled. If a file is
specified, then for every packet that is successfully sent, a protobuf
message is serialized to the file.
2013-01-07 13:05:37 -05:00
Nilay Vaish
2d6470936c sim: have a curTick per eventq
This patch adds a _curTick variable to an eventq. This variable is updated
whenever an event is serviced in function serviceOne(), or all events upto
a particular time are processed in function serviceEvents(). This change
helps when there are eventqs that do not make use of curTick for scheduling
events.
2012-11-16 10:27:47 -06:00
Andreas Sandberg
c0ab52799c sim: Include object header files in SWIG interfaces
When casting objects in the generated SWIG interfaces, SWIG uses
classical C-style casts ( (Foo *)bar; ). In some cases, this can
degenerate into the equivalent of a reinterpret_cast (mainly if only a
forward declaration of the type is available). This usually works for
most compilers, but it is known to break if multiple inheritance is
used anywhere in the object hierarchy.

This patch introduces the cxx_header attribute to Python SimObject
definitions, which should be used to specify a header to include in
the SWIG interface. The header should include the declaration of the
wrapped object. We currently don't enforce header the use of the
header attribute, but a warning will be generated for objects that do
not use it.
2012-11-02 11:32:01 -05:00
Andreas Sandberg
00b3a57d88 base: Add missing header file to addr_range.hh. 2012-11-02 11:32:01 -05:00
Chander Sudanthi
322daba74c base: Fix a few incorrectly handled print format cases
This patch ensures cases like %0.6u, %06f, and %.6u are processed correctly.
The case like %06f is ambiguous and was made to match printf.  Also, this patch
removes the goto statement in cprintf.cc in favor of a function call.
2012-11-02 11:32:00 -05:00
Chander Sudanthi
55787cc0d0 base: split out the VncServer into a VncInput and Server classes
This patch adds a VncInput base class which VncServer inherits from.
Another class can implement the same interface and be used instead
of the VncServer, for example a class that replays Vnc traffic.

--HG--
rename : src/base/vnc/VncServer.py => src/base/vnc/Vnc.py
rename : src/base/vnc/vncserver.cc => src/base/vnc/vncinput.cc
rename : src/base/vnc/vncserver.hh => src/base/vnc/vncinput.hh
2012-11-02 11:32:00 -05:00
Andreas Hansson
36d199b9a9 Mem: Use range operations in bus in preparation for striping
This patch transitions the bus to use the AddrRange operations instead
of directly accessing the start and end. The change facilitates the
move to a more elaborate AddrRange class that also supports address
striping in the bus by specifying interleaving bits in the ranges.

Two new functions are added to the AddrRange to determine if two
ranges intersect, and if one is a subset of another. The bus
propagation of address ranges is also tweaked such that an update is
only propagated if the bus received information from all the
downstream slave modules. This avoids the iteration and need for the
cycle-breaking scheme that was previously used.
2012-10-15 08:07:04 -04:00
Dam Sunwoo
acbb7a2eed ARM: added support for flattened device tree blobs
Newer Linux kernels require DTB (device tree blobs) to specify platform
configurations. The input DTB filename can be specified through gem5 parameters
in LinuxArmSystem.
2012-09-25 11:49:41 -05:00
Andreas Sandberg
4544f3def4 base: Check for static_assert support and provide fallback
C++11 has support for static_asserts to provide compile-time assertion
checking. This is very useful when testing, for example, structure
sizes to make sure that the compiler got the right alignment or vector
sizes.
2012-09-25 11:49:40 -05:00