Commit graph

20 commits

Author SHA1 Message Date
Brandon Potter 7a8dda49a4 style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
Steve Reinhardt 5592798865 style: fix missing spaces in control statements
Result of running 'hg m5style --skip-all --fix-control -a'.
2016-02-06 17:21:19 -08:00
Nathan Binkert eddac53ff6 trace: reimplement the DTRACE function so it doesn't use a vector
At the same time, rename the trace flags to debug flags since they
have broader usage than simply tracing.  This means that
--trace-flags is now --debug-flags and --trace-help is now --debug-help
2011-04-15 10:44:32 -07:00
Gabe Black bce2be525d X86: Put the result used for flags in an intermediate variable.
Using the destination register directly causes the ISA parser to treat it as a
source even if none of the original bits are used.
2011-02-13 17:45:12 -08:00
Nathan Binkert afafaf1dcb style: fix sorting of includes and whitespace in some files 2010-09-10 14:58:04 -07:00
Gabe Black 25ffa8eb8b X86: Create a directory for files that define register indexes.
This is to help tidy up arch/x86. These files should not be used external to
the ISA.

--HG--
rename : src/arch/x86/apicregs.hh => src/arch/x86/regs/apic.hh
rename : src/arch/x86/floatregs.hh => src/arch/x86/regs/float.hh
rename : src/arch/x86/intregs.hh => src/arch/x86/regs/int.hh
rename : src/arch/x86/miscregs.hh => src/arch/x86/regs/misc.hh
rename : src/arch/x86/segmentregs.hh => src/arch/x86/regs/segment.hh
2010-08-23 16:14:24 -07:00
Nathan Binkert 13d64906c2 copyright: Change HP copyright on x86 code to be more friendly 2010-05-23 22:44:15 -07:00
Gabe Black df2c862a07 X86: Fix how the parity flag is computed.
It's only for the lowest order byte, and I had the polarity wrong.
2009-08-05 02:56:12 -07:00
Gabe Black d85cd08113 X86: Set up a named constant for the "fold bit" for int register indices. 2009-07-17 18:49:22 -07:00
Gabe Black 483c3e96b7 X86: Calculate flags based on the actual result. 2009-02-01 00:08:16 -08:00
Gabe Black 8ecea59092 X86: Get rid of stray Sparc DPRINTF
--HG--
extra : convert_revision : d98b2d95448cab4e689d01ceedaa6ad46f9ffc09
2007-10-09 17:20:23 -07:00
Gabe Black a75b6f5106 X86: Move the fp microops to their own file with their own base classes in C++ and python.
--HG--
extra : convert_revision : 9cd223f2005adb36fea2bb56fa39793a58ec958c
2007-09-19 18:27:55 -07:00
Gabe Black bbc8a40857 X86: Fix how ECF is computed in genFlags, and get rid of some duplicate code.
--HG--
extra : convert_revision : f86330a5a9fea782ee63aaa18ca964fb6f9cef0b
2007-09-13 16:35:41 -07:00
Gabe Black cd3f0646ca X86: Added some missing parenthesis in the condition code calculation function.
--HG--
extra : convert_revision : 663021070a4bcc795bb44e1839b8bcec686a42f0
2007-08-07 15:26:50 -07:00
Gabe Black 24541780c6 X86: Implemented and hooked in SCAS (scan string)
Fixed the asz assembler symbol.
Adjusted the condion checks to have appropriate options.
Implemented the SCAS microcode.
Attached SCAS into the decoder.

--HG--
extra : convert_revision : 17bf9ddae6bc2069e43b076f8f83c4e54fb7966c
2007-08-07 15:25:41 -07:00
Gabe Black d8beeff324 X86: Make disassembly use the final register index. Add bits to indicate whether or not register indexes should be "folded".
--HG--
extra : convert_revision : 4b46e71ca91e480f6e1662b7f37b75240d6598e9
2007-07-30 13:23:33 -07:00
Gabe Black 0781609693 Fixed width parameter and provided a parameter to flip the carry bit on subtract.
--HG--
extra : convert_revision : d01bb791b000a2fdfc8600f8fb2f8aadd52b0b63
2007-07-20 14:52:44 -07:00
Gabe Black e524240d68 Make disassembled x86 register indices reflect their size.
This doesn't handle high byte register accesses. It also highlights the fact that address size isn't actually being calculated, and that the size a microop uses needs to be overridable from the microassembly.

--HG--
extra : convert_revision : d495ac4f5756dc55a5f71953ff6963b3c030e6cb
2007-07-17 18:12:33 -07:00
Gabe Black a6757095c3 Add in support for condition code flags.
Some microops can set the condition codes, and some of them can be predicated on them. Some of the codes aren't implemented because it was unclear from the AMD patent what they actually did. They are used with string instructions, but they use variables IP, DTF, and SSTF which don't appear to be documented.

--HG--
extra : convert_revision : 2236cccd07d0091762b50148975f301bb1d2da3f
2007-07-17 15:33:18 -07:00
Gabe Black 4f7809d5e6 Pull some hard coded base classes out of the isa description.
--HG--
rename : src/arch/x86/isa/base.isa => src/arch/x86/isa/outputblock.isa
extra : convert_revision : 7954e7d5eea3b5966c9e273a08bcd169a39f380c
2007-07-14 17:14:19 -07:00