Gabe Black
c3381167c9
ARM: Make the MPUIR register report that 1 unified data region is supported.
2010-06-02 12:58:10 -05:00
Gabe Black
68f2908a70
ARM: Ignore/warn when CSSELR or CCSIDR are accessed.
...
These registers provide information about the caches. Since we can't provide
that information, these will be harmlessly inert.
2010-06-02 12:58:09 -05:00
Gabe Black
e658b6fed4
ARM: Add support for the clidr register.
...
This register will always report 0 caches as implemented. It's not clear how
to find out how many there really are when dealing with an arbitrary
hierarchy.
2010-06-02 12:58:09 -05:00
Gabe Black
af6b1667e9
ARM: Implement a stub of CPACR.
...
This register controls access to the coprocessors. This doesn't actually
implement it, it allows writes which don't turn anything off. In other words,
it allows the simulated program to ask for what it already has.
2010-06-02 12:58:09 -05:00
Gabe Black
660270746b
ARM: Actually write the value of sctlr in ISA.clear().
2010-06-02 12:58:08 -05:00
Gabe Black
6aa229386d
ARM: Implement a function to decode CP15 registers to MiscReg indices.
2010-06-02 12:58:08 -05:00
Gabe Black
9ef82c0bc4
ARM: Track the current ISA mode using the PC.
2010-06-02 12:57:59 -05:00
Gabe Black
50b9149c75
ARM: Hook up the moded versions of the SPSR.
...
These registers can be accessed directly, or through MISCREG_SPSR which will
act as whichever SPSR is appropriate for the current mode.
2009-11-14 19:22:29 -08:00
Gabe Black
2e28da5583
ARM: Implement fault classes.
...
Implement some fault classes using the curriously recurring template pattern,
similar to SPARCs.
2009-11-10 20:34:38 -08:00
Gabe Black
8a4af3668d
ARM: Support forcing load/store multiple to use user registers.
2009-11-08 15:49:03 -08:00
Gabe Black
d188821d37
ARM: Add in more bits for the mon mode.
2009-11-08 02:01:02 -08:00
Gabe Black
43e9209c21
ARM: Initialize processes in user mode.
...
I accidentally left in a change to test using int registers in system mode.
This change reverts that.
2009-11-08 00:54:32 -08:00
Gabe Black
a2b76516c4
ARM: Implement the shadow registers using register flattening.
2009-11-08 00:07:49 -08:00
Gabe Black
010b13c937
ISA: Fix compilation.
2009-10-17 01:13:41 -07:00
Gabe Black
dc0df3f396
ARM: Initialize the CPSR so that we're in user mode.
2009-07-27 00:52:48 -07:00
Gabe Black
e14c408b62
ARM: Fold the MiscRegFile all the way into the ISA object.
2009-07-09 20:28:27 -07:00
Gabe Black
997f36c711
Registers: Collapse ARM and MIPS regfile directories.
...
--HG--
rename : src/arch/arm/regfile/misc_regfile.hh => src/arch/arm/misc_regfile.hh
rename : src/arch/arm/regfile/regfile.cc => src/arch/arm/regfile.cc
rename : src/arch/mips/regfile/misc_regfile.cc => src/arch/mips/misc_regfile.cc
rename : src/arch/mips/regfile/misc_regfile.hh => src/arch/mips/misc_regfile.hh
2009-07-08 23:02:21 -07:00
Gabe Black
32daf6fc3f
Registers: Add an ISA object which replaces the MiscRegFile.
...
This object encapsulates (or will eventually) the identity and characteristics
of the ISA in the CPU.
2009-07-08 23:02:20 -07:00
