amazingly we never did that before. Caused us to run out of
file descriptors in twolf.
sim/process.cc:
Add free_fd() method to free closed target fd in simulator fd map.
Rename open_fd() to alloc_fd() for symmetry with free_fd().
sim/process.hh:
Add free_fd() method to free closed target fd in simulator fd map.
Rename open_fd() to alloc_fd() for symmetry with free_fd().
Crank up MAX_FD while we're at it.
sim/syscall_emul.cc:
Call free_fd() on process when target closes a file.
sim/syscall_emul.hh:
Process open_fd() renamed to alloc_fd().
--HG--
extra : convert_revision : d780f4ccfd5a0989230b0afbdbd276212b87550c
cpu/exetrace.cc:
CPU system name check doesn't work under syscall emulation, so don't
compile it in.
--HG--
extra : convert_revision : 2c128bf759877222107652fd86323be6dc71a34c
running SPEC FP codes).
arch/alpha/isa_desc:
Don't warn about non-standard trapping modes more than
once per static instruction. (Had the flag to suppress
these but forgot to check it!)
build/SConstruct:
Add USE_SSE2 option to enable compiling w/SSE2 (important
for getting IEEE-compliant FP on x86).
--HG--
extra : convert_revision : eac69efb28cce7b48035480d8b7cb004782969f4
on a timeout.
util/qdo:
Qsub needs a kill -9 to die; kill -15 doesn't cut it.
--HG--
extra : convert_revision : 7696b3ecf1a084b68dd909b138ab6aa1b380b5a7
base/random.cc:
Change normal random function to Xrand48 so we have one source of
randomness for everything.
base/random.hh:
Add uniform distribution ability to random functions
dev/etherlink.cc:
dev/etherlink.hh:
Add ability to slightly perturb latency of ethernet
--HG--
extra : convert_revision : f7f856761fd525c233ae2a6d993b1fd702b488f7
util/pbs/pbs.py:
Change the default so that we do not get mail under any circumstances
from pbs.
util/pbs/send.py:
Add a -n flag to send.py that causes the Base directory to *not*
sync with the Link directory
--HG--
extra : convert_revision : 6e872153b6b2c34b61ec2ddbf3e5536876f4b43b
losing type information.
python/m5/config.py:
Allow math on CheckedInt-derived ParamValue classes w/o
losing type information.
- Make CheckedInt derive from NumericParamValue, and *not*
multiply inherit from long
- Move CheckedInt bounds check to _check() hook so we can
call it when value is updated (not just in constructor)
python/m5/convert.py:
- make toInteger() return a long, making toLong() unnecessary
- toMemorySize should return long rather than float
--HG--
extra : convert_revision : c1cf5e15b9ff35d9b573dd545e076fe68afef989
test/genini.py:
Use m5execfile to execute .py files so that sys.path gets handled correctly.
--HG--
extra : convert_revision : 8d8c90a7f40d51c95ba0f43bb9f6d7b2ee49f16e
util/qdo:
Don't automatically set qsub job name, as this causes qsub to fail
if the job name is too long or otherwise unsuitable.
--HG--
extra : convert_revision : 5ba48767574efaaff2c328549adee295780f7f70
interrupts.
dev/sinic.cc:
- The prepareRead function sets all the variables in the register
file that depend on various state bits that change on the fly.
Includes RxDone, RxWait, TxDone, and TxWait
- Use the new register information accessor functions to grab
validity and size information for the read and write functions
- read all registers directly from the register space by offset
and size, not by actual name (less code)
- The side effect of reading the interrupt status (clearing it) now
happens outside the actual chunk of code where the value is loaded.
- Add an iprRead function for when we may want speculative access
to device registers through an ipr or special instruction.
- When RxData or TxData are written, their busy flag is set to
indicate that they have an outstanding transaction.
- The RxHigh and TxLow interrupts are special, they only interrupt
if the rxEmpty or txFull limits were hit
- Move reset to the command register
- Update more registers on reset, clear rxEmpty and txFull
- Data dumps only happen if EthernetData trace flag set
- When a DMA completes, kick the other engine if it was waiting
- implement all of the new interrupts
- serialize the new stuff
dev/sinic.hh:
- Put all registers with their proper size and alignment into
the regs struct so that we can copy multiple at a time.
- Provide accessor functions for accessing the registers with
different sizes.
- Flags to track when the rx fifo hit empty and the tx fifo became
full. These flags are used to determine what to do when below
the watermarks, and are reset when crossing the watermark.
- the txDmaEvent should actually trigger the txDmaDone function
- Add an iprRead function for when we may want speculative access
to device registers through an ipr or special instruction.
- The prepareRead function sets all the variables in the register
file that depend on various state bits that change on the fly.
- add rx_max_intr and dedicated (for dedicated thread) config params
dev/sinicreg.hh:
Add some new registers: Command, RxMaxIntr, RxFifoSize, TxFifoSize,
rename XxThreshold to XxFifoMark
Move Reset to the Command register
Add Thread to the Config register
New interrupts, better names
More info in RxDone and TxDone
Easier access to information on each register (size, read, write, name)
python/m5/objects/Ethernet.py:
Both sinic and nsgige have the dedicated thread
Add a parameter to configure the maximum number for receive
packets per interrupt
--HG--
extra : convert_revision : 407c5a993b6fb17326b4c623ee5d4b25fd69ac80
dev/ns_gige.cc:
why call it pio2 when there's only one?
dev/sinic.cc:
Give the interface a different name for stats/output purposes
--HG--
extra : convert_revision : 895732f1a7e4c53e058a42b51320c2115dc05638
automatically happens in the interface after the packet
is delivered to the device.
--HG--
extra : convert_revision : 07890c4c5ce83fe709ce203f66c330d7cd631235
util/stats/db.py:
need to import the values function
util/stats/info.py:
it's just run
--HG--
extra : convert_revision : 3cb67d8112a1a5fdf761b73732859a71f585bd1f
util/stats/profile.py:
Pass around the number of symbols limit
deal with categorization a bit better.
--HG--
extra : convert_revision : 908410e296efd4514f2dfc0eb9e6e42834585560
util/stats/db.py:
Build a result object as the result of a query operation so it is
easier to populate and contains a bit more information than just
a big dict. Also change the next level data into a matrix instead
of a dict of dicts.
Move the "get" function into the Database object. (The get function
is used by the output parsing function as the interface for accessing
backend storage, same interface for profile stuff.)
Change the old get variable to the method variable, it describes how
the get works, (whether using sum, stdev, etc.)
util/stats/display.py:
Clean up the display functions, mostly formatting.
Handle values the way they should be now.
util/stats/info.py:
Totally re-work how values are accessed from their data store.
Access individual values on demand instead of calculating everything
and passing up a huge result from the bottom.
This impacts the way that proxying works, and in general, everything
is now esentially a proxy for the lower level database. Provide new
operators: unproxy, scalar, vector, value, values, total, and len which
retrieve the proper result from the object they are called on.
Move the ProxyGroup stuff (proxies of proxies!) here from the now gone
proxy.py file and integrate the shared parts of the code. The ProxyGroup
stuff allows you to write formulas without specifying the statistics
until evaluation time.
Get rid of global variables!
util/stats/output.py:
Move the dbinfo stuff into the Database itself. Each source should
have it's own get() function for accessing it's data.
This get() function behaves a bit differently than before in that it
can return vectors as well, deal with these vectors and with no result
conditions better.
util/stats/stats.py:
the info module no longer has the source global variable, just
create the database source and pass it around as necessary
--HG--
extra : convert_revision : 8e5aa228e5d3ae8068ef9c40f65b3a2f9e7c0cff
Create EtherDevBase which both Sinic and NSGigE derive from
bump fifos
drop rx max copy size to 1514 bytes to be friendlier with linux
default interrupt delay is 10us
dev/ns_gige.cc:
Shuffle around parameters to make it easier to find stuff
dev/sinic.cc:
Shuffle around parameters to make it easier to find stuff
rename cycleTime -> clock
dev/sinic.hh:
rename cycleTime -> clock
--HG--
extra : convert_revision : a673bee875e50d083098991aea20972fa8d5b5c7
