Commit graph

19 commits

Author SHA1 Message Date
Ali Saidi
5936c79ba0 Add a functional port that is used to load the original binaries in FS
SE mode now has a port that goes to whatever toplevel mem object the
CPU sees that does the appropriate translation for syscall emulation

SConscript:
    translating port is a syscall emu only source
arch/alpha/system.cc:
base/loader/object_file.cc:
base/loader/object_file.hh:
    Use the new functional port to write the binaries into memory
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/simple/cpu.cc:
    We aren't always going to be writing straight to memory with syscalls
    support writing to a cache
mem/port.hh:
    Add a simple unidirectional functional port that panics on any incoming requests
mem/translating_port.hh:
    make translating port inherit from the simple port
sim/system.cc:
sim/system.hh:
    Add a functional port that is used to load the original binaries

--HG--
extra : convert_revision : 9096866d0b23e3aceea68394abb76e63c0f8fd8d
2006-03-30 18:06:00 -05:00
Ali Saidi
e196d20d9d Make TranslatingPort be a type of Port rather than something special
arch/alpha/arguments.cc:
    rather than returning 0, put a panic in... it will actually make us fix
    this rather than scratching our respective heads
base/loader/object_file.cc:
base/loader/object_file.hh:
    Object loader now takes a port rather than a translating port
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
sim/process.cc:
    Make translating port a type of port rather than anything special
cpu/simple/cpu.cc:
    no need to grab a port from the cpu anymore
mem/physical.cc:
    add an additional type of port to physicalmemory called "functional"
    Only used for functional accesses (loading binaries/syscall emu)
mem/port.hh:
    make readBlok/writeBlob virtual so translating port can do the
    translation first
mem/translating_port.cc:
mem/translating_port.hh:
    Make TranslatingPort inherit from Port
sim/system.cc:
    header file that doesn't exit removed

--HG--
extra : convert_revision : 89b08f6146bba61f5605678d736055feab2fe6f7
2006-03-30 15:59:49 -05:00
Ali Saidi
97e424982a add translations for new sections that are mmapped or when the brk
is changed
Add a default machine width parameter
Arch based live processes

arch/alpha/linux/process.cc:
arch/alpha/linux/process.hh:
arch/alpha/process.cc:
arch/alpha/process.hh:
arch/alpha/tru64/process.cc:
arch/alpha/tru64/process.hh:
arch/mips/linux_process.cc:
arch/mips/process.cc:
arch/mips/process.hh:
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
arch/sparc/process.cc:
arch/sparc/process.hh:
configs/test/test.py:
python/m5/objects/Process.py:
sim/process.cc:
sim/process.hh:
    Architecture based live processes
arch/mips/isa_traits.hh:
arch/sparc/isa_traits.hh:
    Add a default machine width parameter
mem/port.hh:
    gcc 4 really wants  a virtual destructor
sim/byteswap.hh:
    remove the comment around long and unsigned long even though uint32_t
    and int32_t are defined. Seems to work with gcc 4 and 3.4.3.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    add translations for new sections that are mmapped or when the brk
    is changed

--HG--
extra : convert_revision : e2f9f228113c7127c87ef2358209a399c30ed5c6
2006-03-15 17:04:50 -05:00
Steve Reinhardt
2d9c9dba37 Get rid of "Functional" suffix from (read|write)(Blob|String) functions.
--HG--
extra : convert_revision : 1456308af0fd686dff53ec1baddd7747354e1c0a
2006-03-12 16:38:16 -05:00
Steve Reinhardt
e1985e0200 More memory system cleanup:
- Get rid of unused ProxyMemory class (replaced by TranslatingPort).
- Get rid of remaining unused prot_* functions.

mem/physical.cc:
mem/physical.hh:
mem/port.hh:
    Get rid of remaining unused prot_* functions.

--HG--
extra : convert_revision : f16c208f4e4c38bd6bb3626339674c9278da9e07
2006-03-12 16:11:41 -05:00
Gabe Black
3ed62ad025 Work towards factoring isa_traits.hh into smaller, more specialized files.
arch/SConscript:
    Sorted the switch headers, and added registerfile.hh, constants.hh, types.hh, and utility.hh.
arch/alpha/isa_traits.hh:
    Moved the register file types to registerfile.hh, small functions to utility.hh, and cleaned out alot of stuff that isn't necessary anymore.
base/loader/ecoff_object.cc:
base/loader/elf_object.cc:
cpu/pc_event.hh:
cpu/static_inst.hh:
mem/port.hh:
sim/faults.cc:
sim/system.hh:
    base/misc.hh isn't included through isa_traits.hh anymore.
cpu/simple/cpu.cc:
    Added include for arch/utility.hh

--HG--
extra : convert_revision : 24f65f330f87e3c909c939596cfcf48336022eaf
2006-03-10 19:11:27 -05:00
Ron Dreslinski
1fff9f504f Some more changes for compilation. Since memset is now part of port and not virtual, no need for memory to define them.
mem/physical.cc:
    Return 0 for block size.  The chunk generator should treat this as a infinite size.
mem/physical.hh:
    Add function prototype
mem/port.hh:
    Fix function to take no arguments
mem/translating_port.cc:
mem/translating_port.hh:
    Remove the memsetBlob because it doesn't exist yet.

--HG--
extra : convert_revision : dfe352acfc2912ecc9a1ba1863e5666f46b991cc
2006-02-21 20:04:23 -05:00
Ron Dreslinski
4bd11c10a5 Add blocksize functions to physical memory. Fix the port we were using in the process loader.
mem/physical.cc:
    Implement the blockSize function, return VMPageSize for the physical memory
mem/port.hh:
    Add a function to get a pointer to a peer, needed for initVirtMem to work in the loader.
sim/process.cc:
    The way the translating port is setup we don't want the memory port, we want the peer port associated with that memory.  We may need to revisit this.

--HG--
extra : convert_revision : 46a51d448d1683db7bd5afe64adbe167a5743060
2006-02-21 13:39:01 -05:00
Steve Reinhardt
944646124e Rename Port address range functions... like the block size
functions, the send/recv*Query naming seems awkward.
Also create a typedef for AddrRangeList.

--HG--
extra : convert_revision : dd0ff3fad06ec329c82c199700d0a6264f1271d3
2006-02-21 12:32:45 -05:00
Steve Reinhardt
00264ff1b8 Rename port methods:
sendBlockSizeQuery() -> peerBlockSize()
recvBlockSizeQuery() -> deviceBlockSize()
After seeing how this gets used in practice, the
send/recv*Query names just don't make a lot of sense.

dev/io_device.cc:
mem/port.cc:
    sendBlockSizeQuery() -> peerBlockSize()
mem/port.hh:
    sendBlockSizeQuery() -> peerBlockSize()
    recvBlockSizeQuery() -> deviceBlockSize()

--HG--
extra : convert_revision : e96349fb443979b85899a5248bd7cd8665e23ef0
2006-02-21 12:20:02 -05:00
Steve Reinhardt
8a753f6ae2 Move read/writeBlob functions to Port class;
clean up implementation a little.

SConscript:
    Add mem/port.cc
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    Move read/writeBlob functions to base Port class.
mem/port.hh:
    Implement read/writeBlob functions.
    No need for them to be virtual since the proxy
    object (now called TranslatingPort) is not a
    subclass of Port.
mem/port.cc:
    Implement read/writeBlob functions.

--HG--
extra : convert_revision : a3660eaa43a7c286aca962f17fa32fbd42bf1fa6
2006-02-21 11:27:53 -05:00
Ron Dreslinski
562efe214c Adding some definitons for read/write blob/string. I need to locate te code stever wrote to break up address ranges into blk/page size chunks.
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    Add read/write blob definitions, still need to break it up into blk size chunks (where was the code stever wrote for that?)
mem/physical.hh:
    Remove un-needed function (I think)
mem/port.hh:
    Default these virtual functions to panic unimplented
mem/translating_port.cc:
    Again handling read/write string properly.

    Need the stever code to break things into page size chunks yet
mem/translating_port.hh:
    Having trouble with the const declerator.  I will need to read how it works, for now it compiles if I remove it.

--HG--
extra : convert_revision : f174e06700daa9967958d18e01798270c90d6dac
2006-02-21 02:15:02 -05:00
Steve Reinhardt
b8a2d1e5c7 More progress toward compiling... partly by
fixing things, partly by ignoring CPU models
that don't currently compile.

SConscript:
    Split sources for fast, simple, and o3 CPU models into
    separate source lists.  For now none of these are included
    in the base source list, so you won't get any CPU models
    at all... but we still can't compile the other stuff so
    it's not an issue.

    Also get rid of obsolete encumbered/mem file.
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.hh:
cpu/exec_context.cc:
sim/process.cc:
sim/system.cc:
sim/system.hh:
    FunctionalMemory -> Memory
cpu/pc_event.hh:
    Get rid of unused badpc.
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    Move Port functions into .cc file.
mem/port.hh:
    Make recvAddressRangesQuery panic by default instead
    of being abstract... do CPUs need to implement this?
mem/request.hh:
    Add prefetch flags.
sim/syscall_emul.hh:
    Start to fix...

--HG--
extra : convert_revision : ece53b3855f20916caaa381598ac37e8c7adfba7
2006-02-15 17:52:49 -05:00
Ron Dreslinski
7f114ca419 Many changes that make the new mem system compile. Now to convert the rest of the tree to use the new mem system.
mem/mem_object.hh:
    Create constrtor so it compiles
mem/packet.hh:
    Fix typedefs so they compile, add in a few more headers for compilation
mem/page_table.cc:
    convert to new mem system so it compiles
mem/page_table.hh:
    fix it to the version that had asid support.  Make it compile in the new system
mem/physical.cc:
    Fix some compilation bugs
mem/physical.hh:
    Add a type that made compile fail
mem/port.hh:
    Fix a spelling error that messed up compilation
mem/request.hh:
    fix typedefs and forward declerations so it compiles

--HG--
extra : convert_revision : 580fb1ba31ada799ff0122601b8b5a8d994bb8af
2006-02-15 14:21:09 -05:00
Ron Dreslinski
6c7fdb1be7 More include files, removing definition of SendResult whioch isn't needed anymore
cpu/simple/cpu.hh:
    Some needed includes
mem/port.hh:
    Now we removed the sendResult and replaced with void,tick,bool don't need it defined anymore

--HG--
extra : convert_revision : aea08ec299c41b9f9a5b0da7649cef0459315139
2006-01-31 14:42:42 -05:00
Ali Saidi
fccd113e2f Merge zizzer:/bk/newmem
into  zeep.eecs.umich.edu:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 3eb1a665cb813df974aa2815a794b459473c0a77
2006-01-31 14:20:48 -05:00
Ali Saidi
4875b33467 changed sendresult -> bool,tick,void as appropriate
first crack at io devices code
made CpuRequest that derives from Request

dev/io_device.cc:
dev/io_device.hh:
    first crack at the classes for Pio and Dma devices
dev/platform.hh:
    We are going to a system pointer to get info about the memory system
mem/bus.hh:
    changed sendresult -> bool,tick,void as appropriate
mem/port.hh:
    changed sendresult -> bool,tick,void as appropriate;
    removed the sendTiming(pkt,t) call since it is not really
    implementable in a generic fashion
mem/request.hh:
    pulled items from Request into CpuRequest

--HG--
extra : convert_revision : 6213cf2b66417fa023b80884d9e623e78f5aa891
2006-01-31 14:20:39 -05:00
Ron Dreslinski
c0f012d13d Listing some of the enum structures
--HG--
extra : convert_revision : d6ba1873826ee017bf2e4975a44eb2494a323132
2006-01-31 14:09:43 -05:00
Ron Dreslinski
a1033448ea Inital split up of the header files for the new memory system. Still need to fill in some of the include files, and other data types. But this will be the starting point.
mem/bus.hh:
    Inital crack at a bus object that has ports.  Still need to clean up the include file issues.
mem/mem_object.hh:
    Decleration of a base memory object.  Derives from simobject and adds a function to get the port associated with the object.
mem/packet.hh:
    Inital crack at the packet decleration.  Still need to clean up the include file issues.
mem/port.hh:
    Inital crack at the port decleration.  Still need to clean up the include file issues.
mem/request.hh:
    Inital crack at the request decleration.  Still need to clean up the include file issues.

--HG--
extra : convert_revision : f17967d430458f91866a4639ab0cab45d835bb55
2006-01-31 12:12:49 -05:00