Commit graph

149 commits

Author SHA1 Message Date
Ali Saidi
06a9f58c68 DMA: Add IOCache and fix bus bridge to optionally only send requests one
way so a cache can handle partial block requests for i/o devices.

--HG--
extra : convert_revision : a68b5ae826731bc87ed93eb7ef326a2393053964
2007-08-10 16:14:01 -04:00
Ali Saidi
5c38668ed6 Bus: Only call end() on an stl object once in a loop
--HG--
extra : convert_revision : 238dcd6da7577b533e52ada2107591c4e9168ebd
2007-08-10 16:14:01 -04:00
Steve Reinhardt
3afc625975 merge from head
--HG--
extra : convert_revision : 21f7afe2719c00744c0981212c1ee6e442238e01
2007-08-03 03:51:30 -04:00
Ali Saidi
c4e026daf4 Output: Make OutputDirectory::create() be able to create binary files.
--HG--
extra : convert_revision : eae114ee5f27bb8b319df705d9b39bded185b8e8
2007-08-02 14:40:56 -04:00
Steve Reinhardt
d5c74657c9 Merge more changes in from head.
--HG--
extra : convert_revision : 8f170f2754eccdb424a35b5b077225abcf6eee72
2007-07-22 08:10:59 -07:00
Steve Reinhardt
03730edc45 Merge Gabe's changes with mine.
--HG--
extra : convert_revision : f50ed42e7acb3f11e610fd6976eaa8df0c6ba2ab
2007-07-22 10:40:45 -04:00
Gabe Black
ee22bcd609 Fix function which calculates the carry flag.
--HG--
extra : convert_revision : aeb4f2d4c3936089421dbe80647f28ae36178283
2007-07-20 14:54:17 -07:00
Gabe Black
d21c16fd37 Fix a compilation error for SubBitUnions,
--HG--
extra : convert_revision : aad9388afe81ba6541d0b18fa9777e6ffcfd871c
2007-07-18 16:11:16 -07:00
Gabe Black
8f3153ffb3 Create a file of functions for computing condition codes.
These haven't been very thuroughly tested, so use at your own risk.

--HG--
extra : convert_revision : 938885d36fea4a99f8228cdf195a0e0a38dd9031
2007-07-17 13:28:03 -07:00
Gabe Black
13ccac1a3c Add a conversion constructor so a bitunion can be initialized to a value.
Previously, the bitunion would need to be declared and then assigned to separately.

--HG--
extra : convert_revision : d229bd83bc7baeca2259d4e7b080f359915015f3
2007-07-17 13:23:42 -07:00
Gabe Black
873b762d4b Move bitunion code into it's own file.
--HG--
extra : convert_revision : 8d55ca9645ee4e357b7f4595435542eb72490331
2007-07-14 17:28:26 -07:00
Steve Reinhardt
15a51d0cae Add CacheRepl trace flag and move a couple DPRINTFs to it.
--HG--
extra : convert_revision : 31724d19ebdf2cdc2a2bafff83d17845b3a0b183
2007-07-14 13:28:52 -07:00
Steve Reinhardt
288f9cf7d2 Merge from head.
--HG--
extra : convert_revision : f7b3700762b796d44f99aef05783db1ee9c7412e
2007-07-14 12:23:47 -07:00
Steve Reinhardt
c2ee69d687 Make NO_FAST_ALLOC compile.
--HG--
extra : convert_revision : 80579a61eb8d220e75cdee11bc09ca985c8fd85c
2007-07-14 12:12:46 -07:00
Steve Reinhardt
245b0bd9b9 Merge vm1.(none):/home/stever/bk/newmem-head
into  vm1.(none):/home/stever/bk/newmem-cache2

src/base/traceflags.py:
    Hand merge.

--HG--
extra : convert_revision : 9e7539eeab4220ed7a7237457a8f336f79216924
2007-06-23 13:26:30 -07:00
Korey Sewell
753adb38d5 mips import pt. 1
src/arch/mips/SConscript:
    "mips import pt.1".

--HG--
extra : convert_revision : 2e393341938bebf32fb638a209262d074fad4cc1
2007-06-22 19:03:42 -04:00
Steve Reinhardt
83af0fdcf5 Getting closer...
configs/example/memtest.py:
    Add progress interval option.
src/base/traceflags.py:
    Add MemTest flag.
src/cpu/memtest/memtest.cc:
    Clean up tracing.
src/cpu/memtest/memtest.hh:
    Get rid of unused code.

--HG--
extra : convert_revision : 92bd8241a6c90bfb6d908e5a5132cbdb500cbb87
2007-06-21 11:59:17 -07:00
Gabe Black
cb7934f052 Fix an assert to allow rounding mode 0.
--HG--
extra : convert_revision : 119cc87ccf939d3a0048d87d18e125deca378bb7
2007-06-14 13:53:27 +00:00
Nathan Binkert
9f75ac783b only compile fenv.c if we're using fenv
--HG--
extra : convert_revision : 990726f724f99505fc999af82bfb1bbcd6c7f1a2
2007-06-09 22:59:33 -07:00
Nathan Binkert
4f0f217c1b Get rid of GNU libelf and its autoconf nastiness and replace
it with FreeBSD's implementation

--HG--
extra : convert_revision : ef9c4551b9a6b54b76a89f286ff9804c55790621
2007-05-26 18:15:22 -07:00
Nathan Binkert
d667ce01b4 total should be the sum of the vector result of an operation,
not sum the operands and then apply the operation.

--HG--
extra : convert_revision : 06486e59b3dd9588b458ef45c341cc4f2554dc09
2007-05-11 11:47:18 -07:00
Ali Saidi
ee70d8cfc4 bit_val was being used directly in the statement in return. If type B had fewer bits than last, bit_val << last would get the wrong answer.
src/base/bitfield.hh:
    bit_val was being used directly in the statement in
    return. If type B had fewer bits than last, bit_val << last would get
    the wrong answer.

--HG--
extra : convert_revision : cbc43ccd139f82ebbd65f30af5d05b87c4edac64
2007-05-09 12:01:31 -04:00
Ali Saidi
53ba34391f fixes for solaris compile
--HG--
extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320
2007-04-21 19:11:38 -04:00
Ali Saidi
e8ace88e89 create base/fenv.c to standerdize fenv across platforms. It's a c file and not a cpp file because c99
(which defines fenv) doesn't necessarily extend to c++ and it is a problem with solaris. If really
desired this could wrap the ieeefp interface found in bsd* as well, but I see no need at the moment.

src/arch/alpha/isa/fp.isa:
src/arch/sparc/isa/formats/basic.isa:
    use m5_fesetround()/m5_fegetround() istead of fenv interface directly
src/arch/sparc/isa/includes.isa:
    use base/fenv instead of fenv directly
src/base/SConscript:
    add fenv to sconscript
src/base/fenv.hh:
src/base/random.cc:
    m5 implementation to standerdize fenv across platforms.

--HG--
extra : convert_revision : 38d2629affd964dcd1a5ab0db4ac3cb21438e72c
2007-04-21 17:50:47 -04:00
Nathan Binkert
a575fbd4aa Completely re-work how the scons framework incorporates swig
and python code into m5 to allow swig an python code to
easily added by any SConscript instead of just the one in
src/python.  This provides SwigSource and PySource for
adding new files to m5 (similar to Source for C++).  Also
provides SimObject for including files that contain SimObject
information and build the m5.objects __init__.py file.

--HG--
extra : convert_revision : 38b50a0629846ef451ed02f96fe3633947df23eb
2007-04-12 21:20:04 -07:00
Nathan Binkert
d8ca2d3b16 Instead of creating a new python process to run traceflags.py,
just directly exec the file and generate the flags

--HG--
extra : convert_revision : d648ca7348404ded5337db327adafccbd2ae40c8
2007-03-26 21:07:32 -07:00
Gabe Black
3efec59fc5 Missed a const
--HG--
rename : src/arch/x86/isa/decoder.isa => src/arch/x86/isa/decoder/decoder.isa
extra : convert_revision : a60e7495da6fe99fa2375a3f801f2962c3e41adb
2007-03-21 19:15:40 +00:00
Gabe Black
076fd9a707 Fixed up some types and const placement, and added signed bitfields that sign extend themselves.
--HG--
extra : convert_revision : 84bda8fc14f9a6f7dc7982c9aeb15bf688457706
2007-03-20 11:40:30 +00:00
Gabe Black
be3550dfe0 Ditched read or write only subbitfields for now since they were proving difficult to implement. Allow component Bitfields to be instantiated without templates, clean up the implementation a little, and adjust the comments to match.
--HG--
extra : convert_revision : b9b8aea285a95eeabbb4c0233c1bce49b8c773b8
2007-03-19 17:12:50 +00:00
Gabe Black
277ded3de7 For the _BitfieldRO and _BitfieldWO classes, make sure the undesired operator is redefined as private.
--HG--
extra : convert_revision : b18d8e49547c2712ab255d048850c5231313b80a
2007-03-19 14:28:19 +00:00
Gabe Black
898652fe04 Formatting fixes.
--HG--
extra : convert_revision : 276d0667daa4626288b56af3b4b17a3f9052e81a
2007-03-19 14:22:28 +00:00
Gabe Black
43dea39dd4 Lots and lots of comments.
--HG--
extra : convert_revision : 0de510464e2e002775ccd79e2922ccb0055845e5
2007-03-19 14:20:27 +00:00
Gabe Black
ad9ab66175 Reworked the BitUnion stuff a bit. There is moderately better isolation of the backend parts, although there are still macros.
--HG--
extra : convert_revision : e9692c5e697c96061ef70cf78ef532c99dbbd672
2007-03-19 13:28:36 +00:00
Gabe Black
594c415a0d Created BitUnion type which lets you define nested bitfields for an integer in a portable way.
--HG--
extra : convert_revision : 56a9d06b6b7274a493dae4b290c5f9b42e59f20d
2007-03-17 23:33:00 +00:00
Ali Saidi
50475e0e2a Merge zizzer:/bk/newmem
into  pb15.local:/Users/ali/work/m5.newmem

--HG--
extra : convert_revision : 0aa2fadf8978ae30ebe4fde03c525e6b9115117a
2007-03-15 23:21:52 -04:00
Ali Saidi
a18baae026 fix a bug gabe found
--HG--
extra : convert_revision : 12e8f09f6c59a16b2d2eb78bdd1345fc38c4de40
2007-03-15 23:21:01 -04:00
Gabe Black
6cdd434f7f Changed warns to DPRINTFs and multiply by 8 where needed.
--HG--
extra : convert_revision : 9db0bc2420ceb5828a79881fa0b420a2d5e5f358
2007-03-15 16:13:40 +00:00
Gabe Black
ff90b8c1aa Merge zizzer.eecs.umich.edu:/bk/newmem
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 61eca737296a5ce839d3b97f047b4fda062cb899
2007-03-13 15:03:34 -04:00
Ali Saidi
a068d6db0f fix interrupting during a quisce on sparc
src/arch/sparc/ua2005.cc:
    fix interrupting when quisced. Since sticks correspond to instructions when not quisced we need to
    check if were suspended and interrupt at the guess time
src/base/traceflags.py:
    add trace flag for Iob
src/cpu/simple/base.cc:
    Use Quisce instead of IPI trace flag
src/dev/sparc/iob.cc:
    add some Dprintfs

--HG--
extra : convert_revision : 72e18fcc750ad1e4b2bb67b19b354eaffc6af6d5
2007-03-13 00:05:52 -04:00
Ali Saidi
74db8adfbc call ccprintf() with the appropriate argument types so we don't recuse forever
--HG--
extra : convert_revision : 5366be897d1193cf9e93b1fcd0689d19783f73a8
2007-03-12 20:16:13 -04:00
Ali Saidi
8d38dd3231 remove the extern C around gdb helper functions. It's need needed for any new version of gdb to work and it causes at least mine to segfault
--HG--
extra : convert_revision : 5e4c2ec753372fd0569734d3ddb0c8690409ca16
2007-03-12 17:23:08 -04:00
Ali Saidi
885b4f26bb Get rid of those pesky valgrind warnings, Conditional jump or move depends on uninitialised value(s), in the stats package
--HG--
extra : convert_revision : d3a508fc98df4eb8160a211a306be6ab241a4ce8
2007-03-12 14:13:52 -04:00
Gabe Black
6a7e4a5904 Merge zizzer.eecs.umich.edu:/bk/newmem
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 725999a0a5bde6e065bad87b42e973c5c627c69f
2007-03-11 18:19:38 -04:00
Gabe Black
26c0426e44 Make sttw and sttwa use the twin memory operations.
--HG--
extra : convert_revision : 368d1c57a46fd5ca15461cb5ee8e05fd1e080daa
2007-03-11 18:12:33 -04:00
Nathan Binkert
1aef5c06a3 Rework the way SCons recurses into subdirectories, making it
automatic.  The point is that now a subdirectory can be added
to the build process just by creating a SConscript file in it.
The process has two passes.  On the first pass, all subdirs
of the root of the tree are searched for SConsopts files.
These files contain any command line options that ought to be
added for a particular subdirectory.  On the second pass,
all subdirs of the src directory are searched for SConscript
files.  These files describe how to build any given subdirectory.
I have added a Source() function.  Any file (relative to the
directory in which the SConscript resides) passed to that
function is added to the build.  Clean up everything to take
advantage of Source().
function is added to the list of files to be built.

--HG--
extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
2007-03-10 23:00:54 -08:00
Gabe Black
f04e535f26 Add some constructors and an output operator to the Twin??_t types so that o3 SPARC will compile again.
--HG--
extra : convert_revision : af987aaeac87ee92a3b55cf0839d994cf7dea1af
2007-03-07 17:46:05 +00:00
Gabe Black
44f91bb444 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 0822fbcc377781b53d2de9ba40ab9d985ccbc039
2007-03-06 20:58:44 +00:00
Nathan Binkert
d55b25cde6 Move all of the parameters of the Root SimObject so they are
directly configured by python.  Move stuff from root.(cc|hh) to
core.(cc|hh) since it really belogs there now.
In the process, simplify how ticks are used in the python code.

--HG--
extra : convert_revision : cf82ee1ea20f9343924f30bacc2a38d4edee8df3
2007-03-06 11:13:43 -08:00
Gabe Black
05c86ec0d7 Get X86 to load an elf and start a process for it.
src/arch/x86/SConscript:
    Add in process source files.
src/arch/x86/isa_traits.hh:
    Replace magic constant numbers with the x86 register names.
src/arch/x86/miscregfile.cc:
    Make clear the miscreg file succeed. There aren't any misc regs, so clearing them is very easy.
src/arch/x86/process.hh:
    An X86 process class.
src/base/loader/elf_object.cc:
    Add in code to recognize x86 as an architecture.
src/base/traceflags.py:
    Add an x86 traceflag
src/sim/process.cc:
    Add in code to create an x86 process.
src/arch/x86/intregs.hh:
    A file which declares names for the integer register indices.
src/arch/x86/linux/linux.cc:
src/arch/x86/linux/linux.hh:
    A very simple translation of SPARC's linux.cc and linux.hh. It's probably not correct for x86, but it might not be correct for SPARC either.
src/arch/x86/linux/process.cc:
src/arch/x86/linux/process.hh:
    An x86 linux process. The syscall table is split out into it's own file.
src/arch/x86/linux/syscalls.cc:
    The x86 Linux syscall table and the uname function.
src/arch/x86/process.cc:
    The x86 process base class.
tests/test-progs/hello/bin/x86/linux/hello:
    An x86 hello world test binary.

--HG--
extra : convert_revision : f22919e010c07aeaf5757dca054d9877a537fd08
2007-03-06 15:42:30 +00:00
Gabe Black
fc7f9ab80a Add x86 to the Arch enum in the object file class.
--HG--
extra : convert_revision : bc8c5e78aac0e9033d6cbc756d8092369ac29072
2007-03-05 16:12:20 +00:00