Commit graph

3986 commits

Author SHA1 Message Date
Gabe Black
4a16ea95c1 Fix the Frs?s operands to use single width by default, rather than double width.
--HG--
extra : convert_revision : 36137ee025dc5c79665b041b43bd89505715ca70
2007-01-29 22:54:28 -05:00
Gabe Black
1f7db14dd4 Add implementation for the fcmp instructions. These don't behave -quite- right with respect to quite NaNs, but hopefully we don't need to worry about the distinction.
--HG--
extra : convert_revision : 67b6583a20530b7a393aa04d0b71031d3c72ecdd
2007-01-29 22:52:54 -05:00
Gabe Black
a5cb9b51be Fix the FCMPCC bitfield.
--HG--
extra : convert_revision : d2c538e7f469bd12a80eb8585c78d5325d6e6141
2007-01-29 22:46:01 -05:00
Gabe Black
852f26484f Process the actual code as well.
--HG--
extra : convert_revision : 1221bfafe7af48ab04f63391f78eaf49d16077b3
2007-01-29 10:52:13 -05:00
Gabe Black
fc7e36553b Cleaned up disassembly a little.
--HG--
extra : convert_revision : 4665ac7760c9b78a1d7699ceeb541b694211a947
2007-01-29 10:49:59 -05:00
Gabe Black
e176c7d1ff A minor hack to get branch prediction to behave like before on Alpha.
--HG--
extra : convert_revision : 1eaabd13c72aa42c512a04d162a87491818bc621
2007-01-29 10:48:20 -05:00
Gabe Black
105c336743 Fixed a warning about an unused variable.
--HG--
extra : convert_revision : f9c78e86b60c3085cd95b1b4e132205e0ef584dd
2007-01-29 10:46:54 -05:00
Gabe Black
44c6ca84c6 Merge zizzer:/bk/newmem
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 7bea2cb13e2de527134d98d4ee21a55dc4a7d1ad
2007-01-28 18:28:34 -05:00
Ali Saidi
6619fcea4e Merge zizzer:/bk/newmem
into  pb15.local:/Users/ali/work/m5.newmem.head

--HG--
extra : convert_revision : b4db0b350c8a5b3452ede74e5b42eec8ed6685c3
2007-01-28 15:55:44 -05:00
Ali Saidi
7494aa8a14 make unimplemented ops fail
return correct traps for ua2005 fpops that aren't implemented in hw

--HG--
extra : convert_revision : 998fd43f77c5de7078bac1c6caab296b18c9366d
2007-01-28 15:42:01 -05:00
Gabe Black
91ca1b48e2 Merge zizzer:/bk/newmem
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 2398e48722dd71ddf270e93bd7b387078fb30e6b
2007-01-28 14:46:56 -05:00
Nathan Binkert
37795b104d Stick the conversion of python to unix time with all of
the other param code so that other functions can use it
as well.

--HG--
extra : convert_revision : a8becdeadc70af0b64bff5b0770788dfba6e1857
2007-01-28 10:26:59 -08:00
Ali Saidi
f9a341f8e7 I missed a couple of things
--HG--
extra : convert_revision : 2fa44718e381ff743fa1cf12f4db2221dca87e4c
2007-01-27 15:47:18 -05:00
Ali Saidi
02bd40d552 While I'm waiting for legion to run make m5 compile with a few more compilers
SConstruct:
src/SConscript:
    Add flags for Intel CC while i'm at it
src/base/compiler.hh:
    the _Pragma stuff needst to be called this way unless someone happens to have a cleaner way
src/base/cprintf_formats.hh:
    add std:: where appropriate
src/base/statistics.hh:
    use this->map since icc was getting confused about std::map vs the locally defined map
src/cpu/static_inst.hh:
    Add some more dummy returns where needed
src/mem/packet.hh:
    add more dummy returns where needed
src/sim/host.hh:
    use limits to come up with max tick

--HG--
extra : convert_revision : 08e9f7898b29fb9d063136529afb9b6abceab60c
2007-01-27 15:38:04 -05:00
Gabe Black
0358ccee23 Merge zizzer:/bk/newmem
into  zower.eecs.umich.edu:/eecshome/m5/newmem

src/arch/sparc/isa/formats/mem/util.isa:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/system.cc:
    Hand Merge

--HG--
extra : convert_revision : d5e0c97caebb616493e2f642e915969d7028109c
2007-01-27 01:59:20 -05:00
Gabe Black
e41f54f97f Got rid of some DPRINTFs that were printing raw pointers.
--HG--
extra : convert_revision : a79f5ee225208338594e7c4ecf0a71fef941918c
2007-01-27 01:49:21 -05:00
Gabe Black
f48b22f986 Fixed up printReg so that control registers are printed by name. This is possible now becauase Ctrl_Base_DepTag gets added into control register numbers.
--HG--
extra : convert_revision : d6de3be277127547cd942769cd34a54a4ec8db32
2007-01-27 01:47:07 -05:00
Ali Saidi
5c7bf74c07 Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : ca6e616e64d4528478c1505dc7ce111b8888d389
2007-01-26 19:00:38 -05:00
Ali Saidi
de9ac2153e forgot to include this file
--HG--
extra : convert_revision : 4b570a33a951e9286b38873b2be3651ffaee8532
2007-01-26 19:00:17 -05:00
Ali Saidi
5f51fe20de Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 53ee81b099930d4d827db99e2d944ffb8645c706
2007-01-26 18:57:35 -05:00
Ali Saidi
2939d7d061 Make Sparc traceflag even more chatty
some fixes to fp instructions to use the single precision registers
if this is an fp op emit fp check code
add fpregs to m5legion struct

src/arch/sparc/floatregfile.cc:
    Make Sparc traceflag even more chatty
src/arch/sparc/isa/base.isa:
    add code to check if the fpu is enabled
src/arch/sparc/isa/decoder.isa:
    some fixes to fp instructions to use the single precision registers
    fix smul again
    fix subc/subcc/subccc condition code setting
src/arch/sparc/isa/formats/basic.isa:
src/arch/sparc/isa/formats/mem/util.isa:
    if this is an fp op emit fp check code
src/cpu/exetrace.cc:
    check fp regs as well as int regs
src/cpu/m5legion_interface.h:
    add fpregs to m5legion struct

--HG--
extra : convert_revision : e7d26d10fb8ce88f96e3a51f84b48c3b3ad2f232
2007-01-26 18:57:16 -05:00
Ali Saidi
6d9d0c68b5 Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.suncc

--HG--
extra : convert_revision : 1706f6218abec7eb575dcff3ad4aef83894f64ab
2007-01-26 18:50:28 -05:00
Ali Saidi
fd8a4ff5a8 Merge zeep.pool:/z/saidi/work/m5.newmem
into  zeep.pool:/z/saidi/work/m5.suncc

--HG--
extra : convert_revision : 20f61a524a3b53fc0afcf53a24b5a1fe1d96f579
2007-01-26 18:49:40 -05:00
Ali Saidi
63fdabf191 make our code a little more standards compliant
pretty close to compiling w/ suns compiler

briefly:
add dummy return after panic()/fatal()
split out flags by compiler vendor
include cstring and cmath where appropriate
use std namespace for string ops

SConstruct:
    Add code to detect compiler and choose cflags based on detected compiler
    Fix zlib check to work with suncc
src/SConscript:
    split out flags by compiler vendor
src/arch/sparc/isa/decoder.isa:
    use correct namespace for sqrt
src/arch/sparc/isa/formats/basic.isa:
    add dummy return around panic
src/arch/sparc/isa/formats/integerop.isa:
    use correct namespace for stringops
src/arch/sparc/isa/includes.isa:
    include cstring and cmath where appropriate
src/arch/sparc/isa_traits.hh:
    remove dangling comma
src/arch/sparc/system.cc:
    dummy return to make sun cc front end happy
src/arch/sparc/tlb.cc:
src/base/compression/lzss_compression.cc:
    use std namespace for string ops
src/arch/sparc/utility.hh:
    no reason to say something is unsigned unsigned int
src/base/compression/null_compression.hh:
    dummy returns to for suncc front end
src/base/cprintf.hh:
    use standard variadic argument syntax instead of gnuc specefic renaming
src/base/hashmap.hh:
    don't need to define hash for suncc
src/base/hostinfo.cc:
    need stdio.h for sprintf
src/base/loader/object_file.cc:
    munmap is in std namespace not null
src/base/misc.hh:
    use M5 generic noreturn macros
    use standard variadic macro __VA_ARGS__
src/base/pollevent.cc:
    we need file.h for file flags
src/base/random.cc:
    mess with include files to make suncc happy
src/base/remote_gdb.cc:
    malloc memory for function instead of having a non-constant in an array size
src/base/statistics.hh:
    use std namespace for floor
src/base/stats/text.cc:
    include math.h for rint (cmath won't work)
src/base/time.cc:
    use suncc version of ctime_r
src/base/time.hh:
    change macro to work with both gcc and suncc
src/base/timebuf.hh:
    include cstring from memset and use std::
src/base/trace.hh:
    change variadic macros to be normal format
src/cpu/SConscript:
    add dummy returns where appropriate
src/cpu/activity.cc:
    include cstring for memset
src/cpu/exetrace.hh:
    include cstring fro memcpy
src/cpu/simple/base.hh:
    add dummy return for panic
src/dev/baddev.cc:
src/dev/pciconfigall.cc:
src/dev/platform.cc:
src/dev/sparc/t1000.cc:
    add dummy return where appropriate
src/dev/ide_atareg.h:
    make define work for both gnuc and suncc
src/dev/io_device.hh:
    add dummy returns where approirate
src/dev/pcidev.hh:
src/mem/cache/cache_impl.hh:
src/mem/cache/miss/blocking_buffer.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.hh:
src/mem/dram.cc:
src/mem/packet.cc:
src/mem/port.cc:
    include cstring for string ops
src/dev/sparc/mm_disk.cc:
    add dummy return where appropriate
    include cstring for string ops
src/mem/cache/miss/blocking_buffer.hh:
src/mem/port.hh:
    Add dummy return where appropriate
src/mem/cache/tags/iic.cc:
    cast hastSets to double for log() call
src/mem/physical.cc:
    cast pmemAddr to char* for munmap
src/sim/byteswap.hh:
    make define work for suncc and gnuc

--HG--
extra : convert_revision : ef8a1f1064e43b6c39838a85c01aee4f795497bd
2007-01-26 18:48:51 -05:00
Gabe Black
47b2aa6346 Fixed the number of integer registers. There are MaxGL+1 sets of globals, not just MaxGL.
--HG--
extra : convert_revision : 6fd090f112611db1e72a1f129dff03687d52930a
2007-01-26 16:38:29 -05:00
Lisa Hsu
c215d54aac Merge zizzer:/bk/newmem
into  zed.eecs.umich.edu:/z/hsul/work/sparc/x86.m5

--HG--
extra : convert_revision : 1b854ec7caa33d3009383754206b643494c4c42d
2007-01-26 12:51:24 -05:00
Lisa Hsu
202d7f62b9 eliminate cpu checkInterrupts bool, it is redundant and unnecessary.
--HG--
extra : convert_revision : 58e960e5019f944c7ec5606e4b8c93ce42330719
2007-01-26 12:51:07 -05:00
Nathan Binkert
cf72942506 Move time forward to Jan 1, 2009 and update stats
--HG--
extra : convert_revision : 9398362237443dc659f423a342bd27c923e90aea
2007-01-25 19:14:05 -05:00
Nathan Binkert
1c2949a2ff Merge zizzer.eecs.umich.edu:/bk/newmem
into  zeep.pool:/y/binkertn/research/m5/rtc

--HG--
extra : convert_revision : 65ddda89f38c5fa874722c20e5d82ed1bb4e12d9
2007-01-25 15:00:04 -05:00
Nathan Binkert
73dd0ea357 Instead of passing an int to represent time between python and C++
pass the tuple of python's struct_time and interpret that.
Fixes a problem where the local timezone leaked into the time
calculation.  Also fix things so that the unix, python, and RTC
data sheets all get the right time.  Provide both years since 1900
and BCD two digit year.
Put the date back at 1/1/2006 for now.

--HG--
extra : convert_revision : 473244572f468de2cb579a3dd7ae296a6f81f5d7
2007-01-25 14:59:41 -05:00
Ali Saidi
8561c8366c fix smul and sdiv to sign extend, and handle overflow/underflow corretly
Only allow writing/reading of 32 bits of Y
Only allow writing/reading 32 bits of pc when pstate.am
Put any loaded data on the first half of a micro-op in uReg0 so it can't
overwrite the register we are using for address calculation
only erase a entry from the lookup table if it's valid
Put in a temporary check to make sure that lookup table and tlb array stay in sync
if we are interrupted in the middle of a mico-op, reset the micropc/nexpc
so we start  on the first part of it when we come back

src/arch/sparc/isa/decoder.isa:
    fix smul and sdiv to sign extend, and handle overflow/underflow corretly
    Only allow writing/reading of 32 bits of Y
    Only allow writing/reading 32 bits of pc when pstate.am
    Put any loaded data on the first half of a micro-op in uReg0 so it can't
    overwrite the register we are using for address calculation
src/arch/sparc/isa/formats/mem/blockmem.isa:
    Put any loaded data on the first half of a micro-op in uReg0 so it can't
    overwrite the register we are using for address calculation
src/arch/sparc/isa/includes.isa:
    Use limits for 32bit underflow/overflow detection
src/arch/sparc/tlb.cc:
    only erase a entry from the lookup table if it's valid
    Put in a temporary check to make sure that lookup table and tlb array stay in sync
src/arch/sparc/tlb_map.hh:
    add a print function to dump the tlb lookup table
src/cpu/simple/base.cc:
    if we are interrupted in the middle of a mico-op, reset the micropc/nexpc
    so we start  on the first part of it when we come back

--HG--
extra : convert_revision : 50a23837fd888393a5c2aa35cbd1abeebb7f55d4
2007-01-25 13:43:46 -05:00
Gabe Black
5407a6bc32 Fixed a warning that was breaking compilation.
--HG--
extra : convert_revision : 007e83ab452849ce527fe252148e7a1dc423c850
2007-01-25 01:13:56 -05:00
Gabe Black
5f50dfa5d0 Merge zizzer:/bk/newmem
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 2d7ae62a59b91d735bbac093f8a4ab542ea75eee
2007-01-24 19:57:36 -05:00
Ali Saidi
4301e4cd08 use pstate.am to mask off PC/NPC where it needs to +be
check writability of tlb cache entry before using
update tagaccess in places I forgot to
move the tlb privileged test up since it is higher priority

src/arch/sparc/faults.cc:
    save only 32 bits of PC/NPC if Pstate.am is set
src/arch/sparc/isa/decoder.isa:
    return only 32 bits of PC/NPC if Pstate.am is set
    increment cleanwin correctly
src/arch/sparc/tlb.cc:
    check writability of cache entry
    update tagaccess in a few more places
    move the privileged test up since it is higher priority
src/cpu/exetrace.cc:
    mask off upper bits of pc if pstate.am is set before comparing to legion

--HG--
extra : convert_revision : 02a51c141ee3f9a2600c28eac018ea7216f3655c
2007-01-23 15:50:03 -05:00
Gabe Black
b8fc86e28f Update to stats because of minor to branch mispredict accounting.
--HG--
extra : convert_revision : bfb7db6bd118b623f6a38c05a962dc44456160cb
2007-01-22 23:44:44 -08:00
Gabe Black
08501b5a35 Fix for slightly garbled hand merge
--HG--
extra : convert_revision : f9be59e94311571d91b6793b1caa1b6136ef864c
2007-01-22 23:38:17 -08:00
Gabe Black
1352e55ceb Merge zizzer.eecs.umich.edu:/bk/newmem
into  ewok.(none):/home/gblack/m5/newmemo3

src/sim/byteswap.hh:
    Hand Merge

--HG--
extra : convert_revision : 640d33ad0c416934e8a5107768e7f1dce6709ca8
2007-01-22 22:31:48 -08:00
Gabe Black
45c3f1747c Added remote gdb objects to each process
--HG--
extra : convert_revision : 1b5c1470ffc52b2f7719e469153702dec694f9a3
2007-01-22 22:22:09 -08:00
Ali Saidi
60eaa03d72 fix compiling on x86/Solaris
--HG--
extra : convert_revision : f7d21fc277dd7172c244d83fb012883dc8b67895
2007-01-22 21:57:01 -05:00
Ali Saidi
5f662d451e clean up fault code a little bit
simplify and make complete some asi checks
implement all the twin asis and remove panic checks on their use
soft int is supported, so we don't need to print writes to it

src/arch/sparc/asi.cc:
    make AsiIsLittle() be all the little asis.
    Speed up AsiIsTwin() a bit
src/arch/sparc/faults.cc:
    clean up the do*Fault code.... Make it work like legion, in particular
    pstate.priv is left alone, not set to 0 like the spec says
src/arch/sparc/isa/decoder.isa:
    implement some more twin ASIs
src/arch/sparc/tlb.cc:
    All the twin asis are implemented, no need to say their not supported anymore
src/arch/sparc/ua2005.cc:
    softint is supported now, no more need to

--HG--
extra : convert_revision : aef2a1b93719235edff830a17a8ec52f23ec9f8b
2007-01-22 21:55:43 -05:00
Ali Saidi
3011fc6311 we decided to check for .interp instead of .dynamic
--HG--
extra : convert_revision : 4f5c7f9c7653e1e9ebbd488c07426d9f944bb25f
2007-01-22 21:45:29 -05:00
Ali Saidi
ddab4d756a Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 21e1bfa49a933f3b39bd2e7bcd873428f9d01a1b
2007-01-22 16:17:11 -05:00
Ali Saidi
5c1d631f36 check if an executable is dynamic and die if it is
Only implemented for ELf. Someone might want to implement it for ecoff and some point

src/base/loader/elf_object.cc:
src/base/loader/elf_object.hh:
src/base/loader/object_file.cc:
src/base/loader/object_file.hh:
    add a function to check if an executable is dynamic
src/sim/process.cc:
    check if an executable is dynamic and die if it is

--HG--
extra : convert_revision : 830b1b50b08a5abaf895ce6251bbc702c986eebf
2007-01-22 16:14:06 -05:00
Ali Saidi
e347b49a4e use writeTagAccess() function to unify writing of Tag access registers
Fix extracting of secondary context to shove into tag access register
properly sign extend va from 59 bits to 63 (SPARC VA hole)

--HG--
extra : convert_revision : 5d0c2b4db63338c31b2d29b4bb68f39e1d4f4c7b
2007-01-22 16:11:49 -05:00
Ali Saidi
a7072c19db make sure that page bits of VA on tlb insert are 0
--HG--
extra : convert_revision : f04af884687e9b8631e910cf62cd4a58d035c744
2007-01-21 20:02:41 -05:00
Ali Saidi
3af3610c62 add dumb time of day device
--HG--
extra : convert_revision : 52e51ff49f7ed73065f04707ded06dc7254292c4
2007-01-21 18:04:40 -05:00
Ali Saidi
d8eeb2e0ff fix InterruptLevel code to return the correct level
(the bit positition that is set in softint)

--HG--
extra : convert_revision : ba0e1f4ec1f74aac64c3f9bb7eb1b771e17b013a
2007-01-20 23:12:32 -05:00
Ali Saidi
57d11578cf atually set all 64 bits of the retun value to 0
--HG--
extra : convert_revision : 77bfdf07a49d41a2392f429fdc632c1461ac504c
2007-01-20 23:10:43 -05:00
Ali Saidi
95e4a51c6c fix flushw implementation
--HG--
extra : convert_revision : 136b2bddc7cb70cde30e930ad3a13bd56c7162e1
2007-01-20 23:09:28 -05:00
Ali Saidi
ccd67ce44f Rearange tlb code to remove some duplicate
Sparc error register should return ull(0) since it's 64 bits
Fix PS1 pointer creation to use the ps1 page size rather than ps0

--HG--
extra : convert_revision : fb4ef4b90270c8db676ffe53578acfa3c244526e
2007-01-20 12:37:02 -05:00