Commit graph

1599 commits

Author SHA1 Message Date
Steve Reinhardt
58c29640b7 Add a new operation class for IPR accesses, and have IPR-accessing
instructions use it (instead of IntALU, as before).  Default config
has a single non-pipelined 3-cycle unit.  A bit conservative for the
ev6 (some are 1, some are 3).

arch/alpha/isa_desc:
    Make hw_mfpr and hw_mtpr use IprAccessOp op class.
cpu/full_cpu/op_class.hh:
    Add IprAccess.

--HG--
extra : convert_revision : d4103da3343a586936839e29981fd15d6930d442
2005-03-01 00:39:57 -05:00
Steve Reinhardt
89dc94f3bc Make all StaticInst methods const. StaticInst objects represent a
particular binary machine instruction and should be immutable after
they are constructed.

cpu/simple_cpu/simple_cpu.hh:
    Make StaticInst parameters const.

--HG--
extra : convert_revision : e535fa10c842ce173336323f39d9108c1847f8ba
2005-02-25 21:44:33 -05:00
Ron Dreslinski
45eb26e67c Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : e7d839327b07393bfcda0b77758b0832eaf1c1c0
2005-02-25 15:12:05 -05:00
Steve Reinhardt
d697721f57 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/stever/bk/m5

--HG--
extra : convert_revision : 312d9edd677afef6c973c0cb45af4f827a2b881a
2005-02-25 14:49:39 -05:00
Ron Dreslinski
b5c788bf8a Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : e314c70da4a9f4e05c9a8afec1de85000618ea4d
2005-02-25 14:39:55 -05:00
Nathan Binkert
fbe2d26487 Make the SimConsole device dump its output to a file by default
--HG--
extra : convert_revision : 59cc7c3234d1bc96919d08dc0ec7584d8aff1d6f
2005-02-25 14:38:00 -05:00
Steve Reinhardt
368882a847 Fix timing modeling of faults: functionally the very next instruction after
a faulting instruction is the fault handler, which appears as an independent
instruction to the timing model.  New code will stall fetch and not fetch the
fault handler as long as there's a faulting instruction in the pipeline (i.e.,
the faulting inst has to commit first).

Also fix Ali's bad-address assertion that doesn't apply to full system.

Added some more debugging support in the process.  Hopefully we'll move to the new
cpu model soon and we won't need it anymore.

arch/alpha/alpha_memory.cc:
    Reorganize lookup() so we can trace the result of the lookup as well.
arch/alpha/isa_traits.hh:
    Add NoopMachInst (so we can insert them in the pipeline on ifetch faults).
base/traceflags.py:
    Replace "Dispatch" flag with "Pipeline" (since I added similar
    DPRINTFs in other pipe stages).
cpu/exetrace.cc:
    Change default for printing mis-speculated instructions to true (since
    that's often what we want, and right now you can't change it from the
    command line...).

--HG--
extra : convert_revision : a29a98a373076d62bbbb1d6f40ba51ecae436dbc
2005-02-25 12:41:08 -05:00
Ali Saidi
107233adf1 Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : a63405fac7237014c4ef8b765d31d59d3e1bb500
2005-02-24 15:59:29 -05:00
Ali Saidi
fcf52e8543 if we have an invalid addr and it's not a miss-speculation panic
--HG--
extra : convert_revision : 4c906f68c6168100f7e8f2030b1f957c88900768
2005-02-24 15:57:52 -05:00
Ron Dreslinski
986ff12da1 Fix an error with Exclusive state and timing coherence
Add more useful comments
Add a missing header file

--HG--
extra : convert_revision : 8eeb89de50aa1e11396bbf1d88184a66efd74c44
2005-02-24 13:43:33 -05:00
Ron Dreslinski
e11e26872e Merge out, the L2 is now part of the system, not connected to the processor
--HG--
extra : convert_revision : 996d3085b632e93a88ef111dfe853745d6836147
2005-02-24 12:08:57 -05:00
Ron Dreslinski
d5d41d696c Fix it so that using a sampler works with the occ and ocp configurations.
--HG--
extra : convert_revision : a990503a6c01a156230d8910ad86876d09b4f1b3
2005-02-24 11:43:03 -05:00
Ron Dreslinski
4de9689135 Print an error message if a Checkpoint number was defined, but no checkpoint file was sourced
--HG--
extra : convert_revision : 302c1d6720c0ee24fcfc266cd99f501af734a452
2005-02-24 11:34:58 -05:00
Nathan Binkert
b78b634107 Fix the python panic message
sim/pyconfig/m5config.py:
    Fix panic

--HG--
extra : convert_revision : 56d93398e992ed6e95380f6dcdb61cbee54b3893
2005-02-23 12:26:35 -05:00
Ali Saidi
27a338fe2b Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : f149b8ea762d4a83ef76b3bb95f28e0709391ecf
2005-02-23 11:47:49 -05:00
Ali Saidi
a84159174a added two validation rcs files
--HG--
extra : convert_revision : 19e57e5192be3435d72652e3b36aac3b6e43d81c
2005-02-23 11:46:28 -05:00
Ali Saidi
9ebeb9b2de Added mmap start and end so detailed CPU can know if an access is
in a mmaped region

--HG--
extra : convert_revision : e4ee0520c84d94a0d2e804d02035228766abe71f
2005-02-23 11:45:25 -05:00
Ali Saidi
2298e2ba48 Updated Monet configurations
--HG--
extra : convert_revision : 8f9c875541adcf685effcfb2e138f2dbb8463137
2005-02-23 11:43:18 -05:00
Steve Reinhardt
af33e74638 Small initial steps toward generating C++ param structs
from Python object descriptions.  Mostly cleanup of Python
code based on things I encountered trying to figure out
what's going on.  Main reason I'm committing this now is
to transfer work from my laptop to zizzer.

sim/pyconfig/m5config.py:
    Small steps toward param struct generation: all param
    objects should now have a _cppname attribute that holds
    their corresponding C++ type name.

    Made Param ptype attribute an actual type instead of a
    string.  String is still stored in ptype_string.

    Get rid of AddToPath() and Import() (redundant copies
    are in importer, and that seems to be the more logical
    place for them).

    Add a few comments, delete some unused code.
test/genini.py:
    A few fixes to make the environment more compatible
    with what really happens when configs are executed
    from the m5 binary.

--HG--
extra : convert_revision : 9fc8f72cd0c22ba3deada02f37484787342534f2
2005-02-22 23:53:34 -05:00
Ron Dreslinski
3e18c75f00 Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : 0b0583e9404ed922141049f1043e7a149984e567
2005-02-21 18:07:30 -05:00
Nathan Binkert
884a8de509 Set the proper job name for statistics if we're using a JOBNAME
and JOBFILE

--HG--
extra : convert_revision : 44253a39f40efcbbcda226701b0e97d8ea46cf1e
2005-02-21 18:06:09 -05:00
Nathan Binkert
92ed0dffc0 formatting fixes
--HG--
extra : convert_revision : 8b9bfed29b66e8bce11448f175273f5ebb6876b2
2005-02-21 17:32:57 -05:00
Ron Dreslinski
9dd1ab1dba Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : db688679bfd9c670ef44611de71640c3bf564fc0
2005-02-21 16:50:38 -05:00
Nathan Binkert
9b1e2db811 Clean up CPU stuff and make it use params structs
cpu/base_cpu.cc:
cpu/base_cpu.hh:
    Convert the CPU stuff to use a params struct
cpu/memtest/memtest.cc:
    The memory tester is really not a cpu, so don't derive from
    BaseCPU since it just makes things a pain in the butt.  Keep
    track of max loads in the memtest class now that the base class
    doesn't do it for us.
    Don't have any default parameters.
cpu/memtest/memtest.hh:
    The memory tester is really not a cpu, so don't derive from
    BaseCPU since it just makes things a pain in the butt.  Keep
    track of max loads in the memtest class now that the base class
    doesn't do it for us.
cpu/simple_cpu/simple_cpu.cc:
    Convert to use a params struct.
    remove default parameters
cpu/simple_cpu/simple_cpu.hh:
    convert to use a params struct
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
    this isn't really a cpu.  don't derive from BaseCPU
objects/MemTest.mpy:
    we only need one max_loads parameter
sim/main.cc:
    Don't check for the number of CPUs since we may be doing something
    else going on.  If we don't have anything to simulate, the
    simulator will exit anyway.

--HG--
extra : convert_revision : 2195a34a9ec90b5414324054ceb3bab643540dd5
2005-02-19 11:46:41 -05:00
Ron Dreslinski
f825d103da Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : 8fb4bbf165b8c65a54db5fea18ec5aa95172a173
2005-02-18 13:10:37 -05:00
Ron Dreslinski
11acf20fdf Fix misscalculation about the number of cpu's a sampler is connected to
--HG--
extra : convert_revision : f231be327a8adb25d0de35c2ea294f4ef2dc99f7
2005-02-18 12:16:49 -05:00
Kevin Lim
f4d3f781f1 Include errno.h to fix compile errors in gcc 3.4
sim/main.cc:
    Include errno.h

--HG--
extra : convert_revision : ff91579ae590b3c1d11f7468b71f295e6f3edd68
2005-02-17 19:22:42 -05:00
Nathan Binkert
dd4220ec10 rename the simple cpu's multiplier parameter. call it width.
it makes more sense and is less confusing.

cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    width is a better name than multiplier

--HG--
extra : convert_revision : ea2fa4faa160f5657aece41df469bbc9f7244b21
2005-02-17 14:02:03 -05:00
Ron Dreslinski
52fb54f736 Fix typo from my hand merge, missing a paren
--HG--
extra : convert_revision : 7199cd3195ee841f0311ff464dbb4325bb32329c
2005-02-17 12:52:55 -05:00
Ron Dreslinski
45ef238e3f Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : 88afcacc41f5b0fae0ed1ac1821b7ca88c407e85
2005-02-17 12:14:04 -05:00
Ron Dreslinski
b8d65408c8 More changes so that asynchronus blocks work properly
--HG--
extra : convert_revision : 54f4d91be03da90bc77f65b62e5871e9dba6b904
2005-02-17 12:13:37 -05:00
Nathan Binkert
cfe6ed7c48 Fix compile on linux
sim/main.cc:
    For some unknown reason linux's basename doesn't take a const char *

--HG--
extra : convert_revision : 30289195881e16a05429f7025abab7914a9e3eb6
2005-02-17 03:40:17 -05:00
Nathan Binkert
5de3bba758 Make code more portable.
sim/main.cc:
    basename is in libgen

--HG--
extra : convert_revision : 1af6ff2f492b4deee9e56edfa5ee6ea235cd4eb0
2005-02-17 02:50:34 -05:00
Nathan Binkert
a24016c731 Several tweaks to make binning work in any simulation
configuration so that we can always have binning on.

base/statistics.cc:
    If we're binning, and there is no bin active at the time
    we check all stats stuff, create a bin.
base/statistics.hh:
    FS_MEASURE doesn't exist anymore
base/stats/text.cc:
    don't print out bin names if there is only one bin
sim/process.cc:
    don't zero stats.  It happens automatically.
    Don't activate the context at the time it is registered,
    instead activate the first context in a startup callback.
sim/process.hh:
    Add startup callback to initialize the first exec context

--HG--
extra : convert_revision : bcb23cdb184b0abf7cecd79902f8a59b50f71fe4
2005-02-17 02:48:56 -05:00
Ali Saidi
2e4bb0fc0c Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : c807a78d9c3f3be51763dab9685aa4b7361c585c
2005-02-14 20:47:23 -05:00
Ali Saidi
f4e2f0ea33 undoing change per nates request
--HG--
extra : convert_revision : c5c2fd88dfd8d893da51c2b80907260ec14a7593
2005-02-14 20:47:05 -05:00
Nathan Binkert
5e9bc06457 Make it so we append jobs to the joblist in the for loop not
outside of the loop so we get all of the jobs, not just the
last one.

util/pbs/send.py:
    fix indent

--HG--
extra : convert_revision : eee9546b4945ff949fdfdf339fc95a23603b47d3
2005-02-14 20:22:27 -05:00
Ali Saidi
b1ab7b53c3 output dir changes to python files
util/pbs/job.py:
    pass output dir to m5 directly

--HG--
extra : convert_revision : 00d1568bb2da3b3e646fc75b4884314bf4cb2d71
2005-02-14 18:54:38 -05:00
Ali Saidi
538d7d19c8 Merge
--HG--
extra : convert_revision : 10c28ac66c7e71615a239783e21ab36a47de992c
2005-02-13 23:05:47 -05:00
Ali Saidi
57482491c5 build mysql version if libraries exist
add dprintf on alignment faults
fix RR benchmark rcS script name
Add Dual test without rcS script
Update Monet to be closer to the real thing
Fix p4/monet configs
Add a way to read the DRIR register with at 32bit access for validation

SConscript:
build/SConstruct:
    always use mysql if the libraries are installed
arch/alpha/alpha_memory.cc:
    Add a DPRINTF to print alignment faults when they happen
dev/tsunami_cchip.cc:
    Add a way to read the DRIR for validation.

--HG--
extra : convert_revision : 8c112c958f36b785390c46e70a889a79c6bea015
2005-02-13 23:03:04 -05:00
Nathan Binkert
10ee909fbd Merge zizzer.eecs.umich.edu:/bk/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/merge

--HG--
extra : convert_revision : 5d73046310a64b80a6ba3832df3b30b55532d707
2005-02-11 09:48:23 -05:00
Nathan Binkert
06a4686af9 Rework the command line paramters for python output and how
output files and the output directory are are handled.  Make
the output directory configuration via a command line parameter,
or an environment variable.

SConscript:
    Add new output file stuff
base/misc.cc:
dev/simconsole.cc:
    use new output file code
cpu/base_cpu.cc:
    use new output file code to generate output streams
dev/etherdump.cc:
    use the output file code to find the output directory
    use a real stream instead of a pointer
dev/etherdump.hh:
    use a real stream instead of a pointer
objects/Root.mpy:
    output_dir and config_output_file are not longer configured here.
sim/main.cc:
    - Completely rework the command line argument passing to deal with
    changes in python and output files.
    - Update help output to reflect changes.
    - Remove all direct support for .ini files.  They are strictly
    for intermediate representation.
    - Remove the --foo:bar=blah syntax for .ini files and add --foo.bar=blah
    syntax for python.  This will generate: foo.bar = 'blah' in the python
    script.
    - Add '-d' to set the output directory.
    - Use new output file code to access the output stream.
sim/serialize.cc:
    use the new code to find the output directory
sim/universe.cc:
    Get rid of makeOutputStream.  Use the new output file code.
    Remove output_dir and config_output_file as parameters.

--HG--
extra : convert_revision : df2f0e13d401c3a60cae1239aa1ec3511721544d
2005-02-11 09:47:41 -05:00
Nathan Binkert
60b263466e Make sure we have all values when trying to generate the ini file
sim/pyconfig/m5config.py:
    When getting all values, make sure we get the ones that are
    parameter defaults as well.

--HG--
extra : convert_revision : 2b1c4b2f27dfab17ef9df18d7e5936e4a00bb12e
2005-02-11 01:40:49 -05:00
Nathan Binkert
200246d1ca Some cosmetic changes to MyPOpen
util/pbs/pbs.py:
    More tweaks that I forgot

--HG--
extra : convert_revision : 7298f91b80bc7d8d946be93fc622e5f9f6e155f9
2005-02-10 00:02:51 -05:00
Nathan Binkert
8efd7d9063 More fixes to the pbs stuff to make it more robust.
sim/pyconfig/SConscript:
    Embed the jobfile.py script into the binary so that we don't
    need to copy it into the Base directory every time.
test/genini.py:
    Add the util/pbs directory to the path so we can get to
    jobfile.py
    Add a -I argument to set to add to the path.
util/pbs/pbs.py:
    Create a MyPOpen class.  This is a lot like the popen2.Popen3 class
    in the python library except that my version allows redirection of
    standard in and standard out to a file instead of a pipe.
    Use this popen class to execute qsub or ssh qsub.  This was important
    for the ssh version of qsub because we need to pipe the script into
    standard in of ssh so that the script can get to the qsub command.
    (Otherwise we have a problem discovering the path.)
util/pbs/send.py:
    Tweak the script so it figures out paths in NFS correctly.
    Use the new system for running qsub.

--HG--
extra : convert_revision : 1289915ba99cec6fd464b71215c32d2197ff2824
2005-02-09 23:55:21 -05:00
Nathan Binkert
4a3e33fb6d Fix bug in trace param context so we can compile
--HG--
extra : convert_revision : 667c76132adb143e1f2c0726c80ad3e567a530aa
2005-02-09 22:21:58 -05:00
Nathan Binkert
7fed053beb More fixes for running from anywhere.
util/pbs/send.py:
    always access the job directory via full path

--HG--
extra : convert_revision : 1792aadb39428e7c91953ac58f6da212b7f92835
2005-02-09 18:12:39 -05:00
Nathan Binkert
b46baf107f enable the Trace, Statistics, and Serialize param contexts.
objects/Root.mpy:
    Fake the param context stuff for now.
sim/param.cc:
    Make empty vector enums work
sim/serialize.cc:
    serialize_dir is always valid

--HG--
extra : convert_revision : c46373f0f4c70e6a2f01a81c0fa6bacab72d4c4f
2005-02-09 17:33:28 -05:00
Ron Dreslinski
118b374b84 Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : c12f7ad9143bc69d25c39132d30889f22c73edf1
2005-02-09 16:23:56 -05:00
Nathan Binkert
061f40df08 Fixes to thes pbs send script
util/pbs/send.py:
    - add a -d to set the job root directory allowing one to run
    send.py from anywhere.
    - specify full paths to files instead of relative paths to make -d
    work and to allow ssh qsub to work again.
    - make the Link directory only copy links that point to regular files.

--HG--
extra : convert_revision : dd330cee08b97c5d72c3d58ef123f83ac7ccede7
2005-02-09 16:20:53 -05:00