Commit graph

162 commits

Author SHA1 Message Date
Nathan Binkert b47737dde7 Make sure all parameters have default values if they're
supposed to and make sure parameters have the right type.
Also make sure that any object that should be an intermediate
type has the right options set.

--HG--
extra : convert_revision : d56910628d9a067699827adbc0a26ab629d11e93
2007-06-20 08:14:11 -07:00
Nathan Binkert 35147170f9 Move SimObject python files alongside the C++ and fix
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.

--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
2007-05-27 19:21:17 -07:00
Steve Reinhardt 05d14cf3e2 Add new EventWrapper constructor that takes a Tick value
and schedules the event immediately.

--HG--
extra : convert_revision : a84e729a5ef3632cbe6cff858c453c782707d983
2007-05-20 21:43:01 -07:00
Ali Saidi 9dfbea68a2 update for new reschedule semantics
--HG--
extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
2007-05-09 22:34:54 -04:00
Ali Saidi 37b45e3c8c fix the translating ports so it can add a page on a fault
--HG--
extra : convert_revision : 56f6f2cbf4e92b7f2dd8c9453831fab86d83ef80
2007-05-09 15:37:46 -04:00
Nathan Binkert d92fff858b fix SIGUSR1 and SIGUSR2 by clearing the variables after
they're used

--HG--
extra : convert_revision : ed5351f291d45d585bf811a062e162e16b86e886
2007-04-18 08:04:46 -07:00
Gabe Black d54b8b73ed Comment out the remote gdb object for SE mode.
--HG--
extra : convert_revision : a582684f3a2dd1d1d0d8b93a9e213d9108491535
2007-04-09 18:30:50 +00:00
Ali Saidi 8d38dd3231 remove the extern C around gdb helper functions. It's need needed for any new version of gdb to work and it causes at least mine to segfault
--HG--
extra : convert_revision : 5e4c2ec753372fd0569734d3ddb0c8690409ca16
2007-03-12 17:23:08 -04:00
Nathan Binkert 1aef5c06a3 Rework the way SCons recurses into subdirectories, making it
automatic.  The point is that now a subdirectory can be added
to the build process just by creating a SConscript file in it.
The process has two passes.  On the first pass, all subdirs
of the root of the tree are searched for SConsopts files.
These files contain any command line options that ought to be
added for a particular subdirectory.  On the second pass,
all subdirs of the src directory are searched for SConscript
files.  These files describe how to build any given subdirectory.
I have added a Source() function.  Any file (relative to the
directory in which the SConscript resides) passed to that
function is added to the build.  Clean up everything to take
advantage of Source().
function is added to the list of files to be built.

--HG--
extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
2007-03-10 23:00:54 -08:00
Gabe Black df1ea2cf05 Merge zizzer.eecs.umich.edu:/bk/newmem
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 82a956ffc1bedb2c0d05c4ea3469f843f559a475
2007-03-09 18:32:13 -05:00
Gabe Black f1e3e1c305 Use the TheISA namespace in case we're coming from a file that doesn't do that for us. This should be contained in the scope of the function and not leak elsewhere.
--HG--
extra : convert_revision : 0bb0e1457011505a99a871c443bc45f4365e9c7e
2007-03-09 22:14:25 +00:00
Ali Saidi 58f69391ca implement ipi stufff for SPARC
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/arch/x86/utility.hh:
    add hook for system to startup the cpu or not... in the case of FS sparc, only the first cpu would get spunup.. the rest sit in an idle state until they get an ipi
src/arch/sparc/isa/decoder.isa:
    handle writable bits of strandstatus register in miscregfile
src/arch/sparc/miscregfile.hh:
    some constants for the strand status register
src/arch/sparc/ua2005.cc:
    properly implement the strand status register
src/dev/sparc/iob.cc:
    implement ipi generation properly
src/sim/system.cc:
    call into the ISA to start the CPU (or not)

--HG--
extra : convert_revision : 0003b2032337d8a031a9fc044da726dbb2a9e36f
2007-03-09 16:56:39 -05:00
Ali Saidi 2f7a4e1d1b fix compiling of FS after Gabe's last compile
--HG--
extra : convert_revision : a93fa5ad61aa2b8c18bf6c513b617f3425ffb220
2007-03-07 21:50:09 -05:00
Gabe Black 54fc750924 Move the magic m5 PageTableFault into sim/faults.[hh,cc] since it's the same across all architectures.
--HG--
extra : convert_revision : 18d441eb7ac44df4df41771bfe3dec69f7fa70ec
2007-03-07 20:04:46 +00:00
Gabe Black b7ea19760a Make byteswap work correctly on Twin??_t types.
--HG--
extra : convert_revision : a8a14078d62c24e480ffa69591edfc775d1d76cc
2007-03-07 17:46:04 +00:00
Gabe Black 44f91bb444 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 0822fbcc377781b53d2de9ba40ab9d985ccbc039
2007-03-06 20:58:44 +00:00
Nathan Binkert d55b25cde6 Move all of the parameters of the Root SimObject so they are
directly configured by python.  Move stuff from root.(cc|hh) to
core.(cc|hh) since it really belogs there now.
In the process, simplify how ticks are used in the python code.

--HG--
extra : convert_revision : cf82ee1ea20f9343924f30bacc2a38d4edee8df3
2007-03-06 11:13:43 -08:00
Gabe Black 05c86ec0d7 Get X86 to load an elf and start a process for it.
src/arch/x86/SConscript:
    Add in process source files.
src/arch/x86/isa_traits.hh:
    Replace magic constant numbers with the x86 register names.
src/arch/x86/miscregfile.cc:
    Make clear the miscreg file succeed. There aren't any misc regs, so clearing them is very easy.
src/arch/x86/process.hh:
    An X86 process class.
src/base/loader/elf_object.cc:
    Add in code to recognize x86 as an architecture.
src/base/traceflags.py:
    Add an x86 traceflag
src/sim/process.cc:
    Add in code to create an x86 process.
src/arch/x86/intregs.hh:
    A file which declares names for the integer register indices.
src/arch/x86/linux/linux.cc:
src/arch/x86/linux/linux.hh:
    A very simple translation of SPARC's linux.cc and linux.hh. It's probably not correct for x86, but it might not be correct for SPARC either.
src/arch/x86/linux/process.cc:
src/arch/x86/linux/process.hh:
    An x86 linux process. The syscall table is split out into it's own file.
src/arch/x86/linux/syscalls.cc:
    The x86 Linux syscall table and the uname function.
src/arch/x86/process.cc:
    The x86 process base class.
tests/test-progs/hello/bin/x86/linux/hello:
    An x86 hello world test binary.

--HG--
extra : convert_revision : f22919e010c07aeaf5757dca054d9877a537fd08
2007-03-06 15:42:30 +00:00
Gabe Black 82235b8240 Add stub for x86 process creation
--HG--
extra : convert_revision : 3bdbc415a73c6bb4d723f68714a96c9f922ba5e6
2007-03-05 16:15:13 +00:00
Nathan Binkert ba042842c6 Don't use the exact same name as a system header #define
--HG--
extra : convert_revision : 099e380395fc1fdaef993b019d3d4e596e8076c2
2007-03-04 19:26:49 -08:00
Nathan Binkert 61178c8de2 include signal.h
--HG--
extra : convert_revision : 9b5ad2704dfd63a1aa8ad0e4275fd0e3a7d32d6d
2007-03-03 12:26:14 -05:00
Gabe Black 68ad153309 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32

--HG--
extra : convert_revision : bbd0def502e423e64e2c4f6415a4b043b60c7f90
2007-03-03 06:24:01 +00:00
Nathan Binkert ffe6bebb05 Factor code out of main.cc and main.i into a bunch of files
so things are organized in a more sensible manner.  Take apart
finalInit and expose the individual functions which are now
called from python.  Make checkpointing a bit easier to use.

--HG--
extra : convert_revision : f470ddabbb47103e7b4734ef753c40089f2dcd9d
2007-03-02 22:24:00 -08:00
Gabe Black 23dc5099a4 Implement the _llseek syscall. It's Linux only, so we'll actually use the lseek syscall.
--HG--
extra : convert_revision : cccfd5efddbba527c6fb4e07ad2ab235a2670918
2007-03-03 03:34:55 +00:00
Gabe Black 477afcaf5b Fix some issues with 32 bit processes.
--HG--
extra : convert_revision : b01b38bbf185f2279134db4976a9bdb3e381a670
2007-03-03 03:34:54 +00:00
Gabe Black 29e5df890d Make trap instructions always generate TrapInstruction Fault objects which call into the Process object to handle system calls. Refactored the Process objects, and move the handler code into it's own file, and add some syscalls which are used in a natively compiled hello world. Software traps with trap number 3 (not syscall number 3) are supposed to cause the register windows to be flushed but are ignored right now. Finally, made uname for SPARC report a 2.6.12 kernel which is what m22-018.pool happens to be running.
--HG--
extra : convert_revision : ea873f01c62234c0542f310cc143c6a7c76ade94
2007-02-28 16:36:38 +00:00
Nathan Binkert c003dda793 Make it easier to turn off the remote debugger
--HG--
extra : convert_revision : d88784736df5f9b498770fb7e98f52715669c0e1
2007-02-21 22:25:48 -08:00
Ali Saidi 7a2ecf9e26 add pseduo instruction support for sparc
util/m5/Makefile.alpha:
    Clean up to make it a bit easier to muck with
util/m5/Makefile.alpha:
    Make the makefile more reasonable
util/m5/Makefile.alpha:
    Remove authors from copyright.
util/m5/Makefile.alpha:
    Updated Authors from bk prs info
util/m5/Makefile.alpha:
    bk cp Makefile Makefile.alpha
src/arch/sparc/tlb.cc:
    Clean up the cache code a little bit and make sure the uncacbale bit is set when appropriate
src/arch/alpha/isa/decoder.isa:
src/sim/pseudo_inst.cc:
src/sim/pseudo_inst.hh:
    Rename AlphaPseudo -> PseudoInst since it's all generic
src/arch/sparc/isa/bitfields.isa:
src/arch/sparc/isa/decoder.isa:
src/arch/sparc/isa/includes.isa:
src/arch/sparc/isa/operands.isa:
    Add support for pseudo instructions in sparc
util/m5/Makefile.alpha:
util/m5/Makefile.sparc:
    split off alpha make file and sparc make file for m5 app
util/m5/m5.c:
    ivle and ivlb aren't used anymore
util/m5/m5op.h:
    stdint seems like a more generic better fit here
util/m5/m5op_alpha.S:
    move the op ids into their own header file since we can share them between sparc and alpha

--HG--
rename : util/m5/Makefile => util/m5/Makefile.sparc
rename : util/m5/m5op.S => util/m5/m5op_alpha.S
extra : convert_revision : 490ba2e8b8bc6e28bfc009cedec6b686b28e7834
2007-02-21 21:06:17 -05:00
Nathan Binkert 4e7f8c0885 Get rid of the stand alone ParamContext since all of the
relevant stuff has now been moved to python.

--HG--
extra : convert_revision : 608e5ffd0e2b33949a2b183117216f136cfa4484
2007-02-18 09:31:25 -08:00
Nathan Binkert e94103397c Get rid of the Statistics and Statreset ParamContexts, and
expose all of the relevant functionality to python.  Clean
up the mysql code while we're at it.

--HG--
extra : convert_revision : 5b711202a5a452b8875ebefb136a156b65c24279
2007-02-17 22:52:32 -08:00
Nathan Binkert 01f32efa4b Check that there is a param context list before trying
to loop through it.  This is more important as we get rid
of param contexts

--HG--
extra : convert_revision : 5a24048b5c3d609285da83dfcb106910afad6919
2007-02-17 22:36:39 -08:00
Nathan Binkert a41f17b40e Remove the event_ignore stuff since it was never really used
--HG--
extra : convert_revision : ef5f3492e8232d08af7e1eae64ba96c79ca14b6f
2007-02-17 22:11:21 -08:00
Nathan Binkert 8c1c68a31e Give the progress event its own priority
--HG--
extra : convert_revision : 6357ade64deb42fae68b2766545b1c4cdc673fc9
2007-02-17 22:07:50 -08:00
Nathan Binkert 18e245ad0b Pass an exception from a python event through the event queue
back into python so we don't just silently ignore those errors

--HG--
extra : convert_revision : e2f5566a4681f1b8ea80af50071119118afa7d8a
2007-02-17 20:27:11 -08:00
Gabe Black 276e52cdec Force the st_blksize field of a stat call to be 8k.
--HG--
extra : convert_revision : 6cd2dc622ca95cc1ea89bd5e5cbf33d9510c351c
2007-02-14 12:58:28 -05:00
Nathan Binkert 184decd196 Clean up tracing stuff more, get rid of the trace log since
its not all that useful. Fix a few bugs with python/C++
integration.

--HG--
extra : convert_revision : a706512f7dc8b0c88f1ff96fe35ab8fbf9548b78
2007-02-10 15:14:50 -08:00
Steve Reinhardt 572addee5d Fix for previous commit: need to ifdef NDEBUG on the
definition as well as the declaration.

--HG--
extra : convert_revision : 4f073fa6b47bf21abf58d92cb1c9eed699c9c89e
2007-02-06 10:04:44 -08:00
Steve Reinhardt f5a803f56e Use an instance counter to give Events repeatable IDs
in debugging mode (especially valuable for tracediff).

--HG--
extra : convert_revision : 227434a06b5271a8300f2f6861bd06c4ac19e6c4
2007-02-05 22:05:00 -08:00
Ali Saidi fc79ace502 Make SPARC checkpointing work
src/arch/sparc/floatregfile.cc:
    Fix serialization for fpreg
src/arch/sparc/intregfile.cc:
    fix serialization for intreg
src/arch/sparc/miscregfile.cc:
    fix serialization from miscreg
src/arch/sparc/pagetable.cc:
    fix serialization for page table
src/arch/sparc/regfile.cc:
    need to serialize nnpc
src/arch/sparc/tlb.cc:
    write serialization code for tlb
src/cpu/base.cc:
    provide a way to find the thread number a context is
    serialize the instruction counter
src/cpu/base.hh:
    provide a way to find the thread number a context is
    and given a thread number find a context pointer
src/cpu/cpuevent.hh:
    provide method to get thread context from a cpu event for serialization
src/dev/sparc/t1000.cc:
src/dev/sparc/t1000.hh:
    nothing to serialize in t1000
src/sim/serialize.cc:
src/sim/serialize.hh:
    Make findObj() work (it hasn't since we did the python conversion stuff)

--HG--
extra : convert_revision : a95bc4e3c3354304171efbe3797556fdb146bea2
2007-01-30 18:25:39 -05:00
Gabe Black 91ca1b48e2 Merge zizzer:/bk/newmem
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 2398e48722dd71ddf270e93bd7b387078fb30e6b
2007-01-28 14:46:56 -05:00
Nathan Binkert 37795b104d Stick the conversion of python to unix time with all of
the other param code so that other functions can use it
as well.

--HG--
extra : convert_revision : a8becdeadc70af0b64bff5b0770788dfba6e1857
2007-01-28 10:26:59 -08:00
Ali Saidi 02bd40d552 While I'm waiting for legion to run make m5 compile with a few more compilers
SConstruct:
src/SConscript:
    Add flags for Intel CC while i'm at it
src/base/compiler.hh:
    the _Pragma stuff needst to be called this way unless someone happens to have a cleaner way
src/base/cprintf_formats.hh:
    add std:: where appropriate
src/base/statistics.hh:
    use this->map since icc was getting confused about std::map vs the locally defined map
src/cpu/static_inst.hh:
    Add some more dummy returns where needed
src/mem/packet.hh:
    add more dummy returns where needed
src/sim/host.hh:
    use limits to come up with max tick

--HG--
extra : convert_revision : 08e9f7898b29fb9d063136529afb9b6abceab60c
2007-01-27 15:38:04 -05:00
Gabe Black 0358ccee23 Merge zizzer:/bk/newmem
into  zower.eecs.umich.edu:/eecshome/m5/newmem

src/arch/sparc/isa/formats/mem/util.isa:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/system.cc:
    Hand Merge

--HG--
extra : convert_revision : d5e0c97caebb616493e2f642e915969d7028109c
2007-01-27 01:59:20 -05:00
Ali Saidi fd8a4ff5a8 Merge zeep.pool:/z/saidi/work/m5.newmem
into  zeep.pool:/z/saidi/work/m5.suncc

--HG--
extra : convert_revision : 20f61a524a3b53fc0afcf53a24b5a1fe1d96f579
2007-01-26 18:49:40 -05:00
Ali Saidi 63fdabf191 make our code a little more standards compliant
pretty close to compiling w/ suns compiler

briefly:
add dummy return after panic()/fatal()
split out flags by compiler vendor
include cstring and cmath where appropriate
use std namespace for string ops

SConstruct:
    Add code to detect compiler and choose cflags based on detected compiler
    Fix zlib check to work with suncc
src/SConscript:
    split out flags by compiler vendor
src/arch/sparc/isa/decoder.isa:
    use correct namespace for sqrt
src/arch/sparc/isa/formats/basic.isa:
    add dummy return around panic
src/arch/sparc/isa/formats/integerop.isa:
    use correct namespace for stringops
src/arch/sparc/isa/includes.isa:
    include cstring and cmath where appropriate
src/arch/sparc/isa_traits.hh:
    remove dangling comma
src/arch/sparc/system.cc:
    dummy return to make sun cc front end happy
src/arch/sparc/tlb.cc:
src/base/compression/lzss_compression.cc:
    use std namespace for string ops
src/arch/sparc/utility.hh:
    no reason to say something is unsigned unsigned int
src/base/compression/null_compression.hh:
    dummy returns to for suncc front end
src/base/cprintf.hh:
    use standard variadic argument syntax instead of gnuc specefic renaming
src/base/hashmap.hh:
    don't need to define hash for suncc
src/base/hostinfo.cc:
    need stdio.h for sprintf
src/base/loader/object_file.cc:
    munmap is in std namespace not null
src/base/misc.hh:
    use M5 generic noreturn macros
    use standard variadic macro __VA_ARGS__
src/base/pollevent.cc:
    we need file.h for file flags
src/base/random.cc:
    mess with include files to make suncc happy
src/base/remote_gdb.cc:
    malloc memory for function instead of having a non-constant in an array size
src/base/statistics.hh:
    use std namespace for floor
src/base/stats/text.cc:
    include math.h for rint (cmath won't work)
src/base/time.cc:
    use suncc version of ctime_r
src/base/time.hh:
    change macro to work with both gcc and suncc
src/base/timebuf.hh:
    include cstring from memset and use std::
src/base/trace.hh:
    change variadic macros to be normal format
src/cpu/SConscript:
    add dummy returns where appropriate
src/cpu/activity.cc:
    include cstring for memset
src/cpu/exetrace.hh:
    include cstring fro memcpy
src/cpu/simple/base.hh:
    add dummy return for panic
src/dev/baddev.cc:
src/dev/pciconfigall.cc:
src/dev/platform.cc:
src/dev/sparc/t1000.cc:
    add dummy return where appropriate
src/dev/ide_atareg.h:
    make define work for both gnuc and suncc
src/dev/io_device.hh:
    add dummy returns where approirate
src/dev/pcidev.hh:
src/mem/cache/cache_impl.hh:
src/mem/cache/miss/blocking_buffer.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.hh:
src/mem/dram.cc:
src/mem/packet.cc:
src/mem/port.cc:
    include cstring for string ops
src/dev/sparc/mm_disk.cc:
    add dummy return where appropriate
    include cstring for string ops
src/mem/cache/miss/blocking_buffer.hh:
src/mem/port.hh:
    Add dummy return where appropriate
src/mem/cache/tags/iic.cc:
    cast hastSets to double for log() call
src/mem/physical.cc:
    cast pmemAddr to char* for munmap
src/sim/byteswap.hh:
    make define work for suncc and gnuc

--HG--
extra : convert_revision : ef8a1f1064e43b6c39838a85c01aee4f795497bd
2007-01-26 18:48:51 -05:00
Gabe Black 1352e55ceb Merge zizzer.eecs.umich.edu:/bk/newmem
into  ewok.(none):/home/gblack/m5/newmemo3

src/sim/byteswap.hh:
    Hand Merge

--HG--
extra : convert_revision : 640d33ad0c416934e8a5107768e7f1dce6709ca8
2007-01-22 22:31:48 -08:00
Gabe Black 45c3f1747c Added remote gdb objects to each process
--HG--
extra : convert_revision : 1b5c1470ffc52b2f7719e469153702dec694f9a3
2007-01-22 22:22:09 -08:00
Ali Saidi 60eaa03d72 fix compiling on x86/Solaris
--HG--
extra : convert_revision : f7d21fc277dd7172c244d83fb012883dc8b67895
2007-01-22 21:57:01 -05:00
Ali Saidi 5c1d631f36 check if an executable is dynamic and die if it is
Only implemented for ELf. Someone might want to implement it for ecoff and some point

src/base/loader/elf_object.cc:
src/base/loader/elf_object.hh:
src/base/loader/object_file.cc:
src/base/loader/object_file.hh:
    add a function to check if an executable is dynamic
src/sim/process.cc:
    check if an executable is dynamic and die if it is

--HG--
extra : convert_revision : 830b1b50b08a5abaf895ce6251bbc702c986eebf
2007-01-22 16:14:06 -05:00
Gabe Black 8840ebcb00 Merge zizzer:/bk/newmem
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : f4a05accb8fa24d425dd818b1b7f268378180e99
2007-01-03 00:52:30 -05:00