Commit graph

18 commits

Author SHA1 Message Date
Korey Sewell
b3464ef180 support for unaligned memory access
arch/mips/isa/base.isa:
    disassembly fixes
arch/mips/isa/decoder.isa:
    support for unaligned loads/stores
arch/mips/isa_traits.hh:
    edit Syscall Reg values
arch/mips/linux_process.cc:
    call writevFunc on writev syscall

--HG--
extra : convert_revision : 4aea6d069bd7ba0e83b23d2d85c50d68532f0454
2006-03-19 13:40:03 -05:00
Korey Sewell
e6bc492554 more syscall fixes
arch/mips/isa_traits.hh:
    use syscall return function from alpha
arch/mips/linux_process.cc:
    fix some syntax errors,  map some functions to the desc. table

--HG--
extra : convert_revision : 75e8e8893b7d96bb4fc8e8eced53bd16c0a727d1
2006-03-18 11:31:31 -05:00
Korey Sewell
8ddd509c7c steps toward making syscalls work
arch/mips/isa/decoder.isa:
arch/mips/isa_traits.hh:
sim/syscall_emul.cc:
    make syscall instruction functional
arch/mips/linux_process.cc:
    add all MIPS/Linux syscalls to descriptor list

--HG--
extra : convert_revision : 5455a345e76be921e9f63b248aef874b6358e465
2006-03-18 10:51:28 -05:00
Korey Sewell
77a2f97c35 Merge zizzer:/bk/newmem
into  zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-mips

--HG--
extra : convert_revision : 9bdde9b5bd3049744451eda1134f080b7c4b1b59
2006-03-15 23:38:55 -05:00
Ali Saidi
97e424982a add translations for new sections that are mmapped or when the brk
is changed
Add a default machine width parameter
Arch based live processes

arch/alpha/linux/process.cc:
arch/alpha/linux/process.hh:
arch/alpha/process.cc:
arch/alpha/process.hh:
arch/alpha/tru64/process.cc:
arch/alpha/tru64/process.hh:
arch/mips/linux_process.cc:
arch/mips/process.cc:
arch/mips/process.hh:
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
arch/sparc/process.cc:
arch/sparc/process.hh:
configs/test/test.py:
python/m5/objects/Process.py:
sim/process.cc:
sim/process.hh:
    Architecture based live processes
arch/mips/isa_traits.hh:
arch/sparc/isa_traits.hh:
    Add a default machine width parameter
mem/port.hh:
    gcc 4 really wants  a virtual destructor
sim/byteswap.hh:
    remove the comment around long and unsigned long even though uint32_t
    and int32_t are defined. Seems to work with gcc 4 and 3.4.3.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    add translations for new sections that are mmapped or when the brk
    is changed

--HG--
extra : convert_revision : e2f9f228113c7127c87ef2358209a399c30ed5c6
2006-03-15 17:04:50 -05:00
Korey Sewell
c32b4ecac1 infinitesimal small baby steps toward MIPS actually working
arch/mips/isa/formats/branch.isa:
    let user know that we alter r31 in disassembly
arch/mips/isa_traits.cc:
    add copyRegs function ...
    comment out serialize float code for now
arch/mips/isa_traits.hh:
    make FloatRegFile a class ... change values of architectural regs
arch/mips/process.cc:
    change MIPS to Mips
base/loader/elf_object.cc:
    get global pointer initialized to a value
base/loader/elf_object.hh:
    Add global_ptr to elf_object constructor
base/loader/object_file.hh:
    MIPS to Mips
base/traceflags.py:
    SimpleCPU trace flag
cpu/simple/cpu.cc:
    DPRINTF flags for SimpleCPU
cpu/static_inst.hh:
    Add Decoder functions to static_inst.hh

--HG--
extra : convert_revision : 0544a8524d3fe4229428cb06822f7da208c72459
2006-03-15 16:26:40 -05:00
Korey Sewell
6547e8882b Minor Sconscript edit ... mips decoder changes ... initialize NNPC and output fault name in simple cpu
SConscript:
    Separate Alpha EIO from syscall building for other architectures
arch/isa_specific.hh:
    change MIPS constant to 34k
arch/mips/isa/decoder.isa:
    Allow sll,ssnop,nop, and ehb to be determined through decoder using
    the different types of default cases
arch/mips/isa/formats/branch.isa:
    Delete debug code
arch/mips/isa/formats/noop.isa:
    add a Nop format
arch/mips/isa_traits.hh:
    use constants instead of enums
arch/mips/process.cc:
    point to the correct header file
cpu/simple/cpu.cc:
    Output the actual fault name
sim/process.cc:
    Inititalize NNPC

--HG--
extra : convert_revision : adb0026dfad25b14c98fb03c98bfe9c681bba6f8
2006-03-14 18:28:51 -05:00
Korey Sewell
4d19bbeeeb MIPS is back to compiling and building now!
arch/alpha/isa_traits.hh:
    used for SimpleCPU instead of explicitly calling the namespace we declare in isa_traits.hhs
    so other archs. can use SimpleCPU
arch/mips/SConscript:
    dont include common_syscall or tru64
arch/mips/faults.cc:
arch/mips/faults.hh:
arch/mips/isa/formats/unimp.isa:
arch/mips/isa/formats/unknown.isa:
    Change Faults to new format
arch/mips/isa/decoder.isa:
    Fix readMiscReg access
    Made change so that you cant explicitly tell if a instruction nop,ehb,or ssnop... These are all variants
    of the sll instruction so I may need to make a separte class of instructions to handle thse better
arch/mips/isa/includes.isa:
    add isa_traits.hh and MipsISA included into every auto-gen file
arch/mips/isa_traits.cc:
    create copyMiscRegs function...
    delete useless code
arch/mips/isa_traits.hh:
    clean up for build
arch/mips/linux_process.cc:
    mem is now getMemPort(), linux process objects now take in a system argument
arch/mips/linux_process.hh:
    new argument for linux process
arch/mips/process.cc:
    add system
arch/mips/process.hh:
    add system variable
cpu/cpu_exec_context.cc:
    Change AlphaISA to TheISA
cpu/exec_context.hh:
    add readNextNPC and setNextNPC functions
cpu/simple/cpu.cc:
    include isa_traits for namespace declariation
cpu/simple/cpu.hh:
    PC & NPC access/modify functions
arch/mips/utility.hh:
    file needed for compile

--HG--
extra : convert_revision : 29a327e79c51c6174a6e526aa68c7aab7e7eb535
2006-03-12 05:57:34 -05:00
Korey Sewell
a3aae21d03 last changes before big merge
arch/alpha/isa_traits.hh:
arch/sparc/isa_traits.hh:
    add nnpc for compiling purposes in exec_context setNextNPC function
cpu/exec_context.hh:
    set NNPC function
cpu/simple/cpu.cc:
    use NNPC in determining what PC we are using

--HG--
extra : convert_revision : e810cfbc5dc31879b20d2cc40bf9871613203532
2006-03-09 03:27:51 -05:00
Korey Sewell
bfd820f704 Update MiscReg enum and miscRegFile definition
update miscReg file access

arch/mips/isa/decoder.isa:
arch/mips/isa_traits.cc:
    update miscRegfile access
arch/mips/isa_traits.hh:
    Update MiscReg enum and miscRegFile definition

--HG--
extra : convert_revision : 9b6b9343d674e1e38e25bb9a4ffe4325142e7424
2006-03-08 04:36:55 -05:00
Korey Sewell
20e9a90edc updated MIPS ISA files .... all files should be able to compile/build with MIPS option except isa_traits.*
which I need to update the misc. regfile accesses

arch/mips/faults.cc:
arch/mips/faults.hh:
    alpha to mips
arch/mips/isa/base.isa:
    add includes
arch/mips/isa/bitfields.isa:
    more bitfields
arch/mips/isa/decoder.isa:
    lots o' lots o' lots o' changes!!!!
arch/mips/isa/formats.isa:
    include cop0.isa
arch/mips/isa/formats/basic.isa:
    fix faults
arch/mips/isa/formats/branch.isa:
arch/mips/isa/formats/fp.isa:
arch/mips/isa/formats/int.isa:
arch/mips/isa/formats/mem.isa:
arch/mips/isa/formats/noop.isa:
arch/mips/isa/formats/trap.isa:
arch/mips/isa/formats/unimp.isa:
arch/mips/isa/formats/unknown.isa:
arch/mips/isa/formats/util.isa:
arch/mips/isa/operands.isa:
arch/mips/isa_traits.cc:
arch/mips/linux_process.cc:
    merge MIPS-specific comilable/buidable files code into multiarch
arch/mips/isa_traits.hh:
    merge MIPS-specific comilable/buidable files code into multiarch... the miscRegs file accesses i have
    need to be recoded and everything should build then ...
arch/mips/stacktrace.hh:
    file copied over

--HG--
extra : convert_revision : 4a72e14fc5fb0a0d1f8b205dadbbf69636b7fb1f
2006-03-08 02:05:38 -05:00
Korey Sewell
54b47bc5ae MIPS Compiles scons/MIPS_SE/arch/mips/decoder.do!!!!!!
arch/mips/faults.hh:
    remove nonsense
arch/mips/isa/base.isa:
    define R31
arch/mips/isa/bitfields.isa:
    forgotten bitfields
arch/mips/isa/decoder.isa:
    INT64 -> int64_t
arch/mips/isa/formats.isa:
    fix comments
arch/mips/isa/formats/branch.isa:
    Branch -> BranchLikely
    RB -> RT
arch/mips/isa/formats/fp.isa:
    Make FP ops generates
arch/mips/isa/formats/mem.isa:
    RA,RB -> RS,RT
arch/mips/isa/formats/noop.isa:
    Rc -> Rd
arch/mips/isa/formats/util.isa:
    forgot brace and semicolon
arch/mips/isa/includes.isa:
    remove unnecessary files
arch/mips/isa_traits.hh:
    spacing
cpu/static_inst.hh:
    add cond_delay_slot flag

--HG--
extra : convert_revision : 3bc7353b437f9a764e85cc462bed86c9d654eb37
2006-02-22 03:33:35 -05:00
Korey Sewell
a4799a89de Renaming alpha files and changing some MIPS stuff to be more like Alpha version
SConscript:
    changed the alpha_memory.hh to memory.hh in SConscript
arch/isa_parser.py:
    temporarily comment out o3 model
arch/mips/isa/base.isa:
arch/mips/isa_traits.cc:
arch/mips/isa_traits.hh:
    Fix Up Base Class to mirror how Alpha generates StaticInsts
arch/mips/faults.cc:
    MIPS fault.cc file
arch/mips/faults.hh:
    MIPS fault.hh file

--HG--
rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux_process.cc
rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux_process.hh
rename : arch/alpha/alpha_memory.cc => arch/alpha/memory.cc
rename : arch/alpha/alpha_memory.hh => arch/alpha/memory.hh
rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64_process.cc
rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64_process.hh
extra : convert_revision : f92d6e765ca96a8b952aef79ed119fa29464563b
2006-02-21 22:02:05 -05:00
Korey Sewell
bdf3fd92ba make MIPS specific
--HG--
extra : convert_revision : c019fad60fbf1a316bc6201b8ce8acf5a9875989
2006-02-20 14:48:10 -05:00
Korey Sewell
a48c24b61e Support NNPC and branch instructions ... Outputs to decoder.cc correctly
Edits to the CPU model may still need to be made to handle branch likely insts...

arch/isa_parser.py:
    add a NNPC operand ...
arch/mips/isa/base.isa:
    change SPARC to MIPS
arch/mips/isa/decoder.isa:
    typo < to >=
arch/mips/isa/formats/basic.isa:
    spacing
arch/mips/isa/formats/branch.isa:
    add code for branch instructions (still need adjustments for the branch likely)
arch/mips/isa/operands.isa:
    support for NNPC and R31
arch/mips/isa_traits.hh:
    NNPC Addr variable

--HG--
extra : convert_revision : df03d2a71c36dbc00270c2e3d7882b4f09ed97ad
2006-02-18 23:17:45 -05:00
Gabe Black
82f2ae56ed Alot of changes to push towards ISA independence. Highlights are renaming of the isa_desc files, movement of byte_swap.hh into sim, and the creation of arch/isa_traits.hh
SConscript:
    Moved some files out of targetarch. The either no longer need to be there, never needed to be there, or should be referred to directly in arch/alpha due to there strictly alpha content.
arch/alpha/isa_traits.hh:
    Added alpha's endianness to it's isa_traits.hh
arch/mips/isa_traits.hh:
    Added MIPS endianness to it's isa_traits.hh
arch/sparc/isa_traits.hh:
    Added SPARCs endianess to it's isa_traits.hh
build/SConstruct:
    Added MIPS as a valid architecture
cpu/exec_context.hh:
    Included arch/isa_traits.hh to bring in the endianness of the system.
cpu/o3/alpha_cpu.hh:
    Included arch/isa_traits.hh to bring in the systems endianness, and removed the hardcoding of little endianness
cpu/o3/fetch_impl.hh:
kern/freebsd/freebsd_system.cc:
    Included arch/isa_traits.hh to bring in the systems endianness, and removed the hardcoding to little endianness.
sim/system.cc:
    Included arch/isa_traits.hh to bring in the systems endianness, and removed the hardcoding to little endian.

--HG--
extra : convert_revision : b1ab34b7569db531cd1c74f273b24222e63f9007
2006-02-08 01:03:55 -05:00
Korey Sewell
2bc106a8e7 "sparc" -> "mips"
arch/mips/isa_desc/formats.h:
arch/mips/isa_desc/formats/basic.format:
arch/mips/isa_desc/formats/branch.format:
arch/mips/isa_desc/formats/integerop.format:
arch/mips/isa_desc/formats/mem.format:
arch/mips/isa_desc/formats/noop.format:
arch/mips/isa_desc/formats/trap.format:
arch/mips/isa_traits.cc:
arch/mips/isa_traits.hh:
    changing "sparc" strings to "mips" everywhere

--HG--
extra : convert_revision : eaecf9eeac26e3ef0726deef2fb5d7e9ad172984
2006-01-26 16:19:44 -05:00
Korey Sewell
90aa2dbfc2 initial changes to decoder.hh and copied files from arch/sparc directory
arch/mips/isa_desc/bitfields.h:
arch/mips/isa_desc/formats.h:
arch/mips/isa_desc/formats/basic.format:
arch/mips/isa_desc/formats/branch.format:
arch/mips/isa_desc/formats/integerop.format:
arch/mips/isa_desc/formats/mem.format:
arch/mips/isa_desc/formats/noop.format:
arch/mips/isa_desc/formats/trap.format:
arch/mips/isa_desc/includes.h:
arch/mips/isa_desc/operands.h:
arch/mips/isa_traits.cc:
arch/mips/isa_traits.hh:
    copied from sparc ISA directory
arch/mips/isa_desc/decoder.h:
    decoder I started to work on...

--HG--
rename : arch/sparc/isa_desc/bitfields.h => arch/mips/isa_desc/bitfields.h
rename : arch/sparc/isa_desc/decoder.h => arch/mips/isa_desc/decoder.h
rename : arch/sparc/isa_desc/formats.h => arch/mips/isa_desc/formats.h
rename : arch/sparc/isa_desc/formats/basic.format => arch/mips/isa_desc/formats/basic.format
rename : arch/sparc/isa_desc/formats/branch.format => arch/mips/isa_desc/formats/branch.format
rename : arch/sparc/isa_desc/formats/integerop.format => arch/mips/isa_desc/formats/integerop.format
rename : arch/sparc/isa_desc/formats/mem.format => arch/mips/isa_desc/formats/mem.format
rename : arch/sparc/isa_desc/formats/noop.format => arch/mips/isa_desc/formats/noop.format
rename : arch/sparc/isa_desc/formats/trap.format => arch/mips/isa_desc/formats/trap.format
rename : arch/sparc/isa_desc/includes.h => arch/mips/isa_desc/includes.h
rename : arch/sparc/isa_desc/operands.h => arch/mips/isa_desc/operands.h
rename : arch/sparc/isa_traits.cc => arch/mips/isa_traits.cc
rename : arch/sparc/isa_traits.hh => arch/mips/isa_traits.hh
extra : convert_revision : d4f281960ecf2dce479fb665469c6f2c5dd3063e
2006-01-25 14:43:47 -05:00
Renamed from arch/sparc/isa_traits.hh (Browse further)