Commit graph

6 commits

Author SHA1 Message Date
Andreas Sandberg 33ab8f735d kvm: Add support for pseudo-ops on ARM
This changeset adds support for m5 pseudo-ops when running in
kvm-mode. Unfortunately, we can't trap the normal gem5 co-processor
entry in KVM (it doesn't seem to be possible to trap accesses to
non-existing co-processors). We therefore use BZJ instructions to
cause a trap from virtualized mode into gem5. The BZJ instruction is
becomes a normal branch to the gem5 fallback code when running in
simulated mode, which means that this patch does not need to change
the ARM ISA-specific code.

Note: This requires a patched host kernel.
2013-04-22 13:20:32 -04:00
Ali Saidi 798403b689 ARM: Update m5op assembly for thumb compilation. 2012-05-10 18:04:26 -05:00
Dam Sunwoo 0ed3c84c7b util: implements "writefile" gem5 op to export file from guest to host filesystem
Usage: m5 writefile <filename>

File will be created in the gem5 output folder with the identical filename.
Implementation is largely based on the existing "readfile" functionality.
Currently does not support exporting of folders.
2012-01-31 07:46:04 -08:00
Ali Saidi 0b7ca66919 ARM: Cleanup m5ops usage of r0 and r1 a bit. 2011-06-17 12:20:11 -05:00
Gedare Bloom 3f1f16703d ARM: Add m5ops and related support for workbegin() and workend() to ARM ISA. 2011-06-17 12:20:10 -05:00
Ali Saidi 432fa0aad6 ARM: Add support for M5 ops in the ARM ISA 2010-11-08 13:58:24 -06:00