Commit graph

8703 commits

Author SHA1 Message Date
Andreas Hansson
13ef7a5647 MEM: Differentiate functional cache accesses from CPU and memory
This patch changes the functionalAccess member function in the cache
model such that it is aware of what port the access came from, i.e. if
it came from the CPU side or from the memory side. By adding this
information, it is possible to respect the 'forwardSnoops' flag for
snooping requests coming from the memory side and not forward
them. This fixes an outstanding issue with the IO bus getting accesses
that have no valid destination port and also cleans up future changes
to the bus model.
2012-01-17 12:55:07 -06:00
Ali Saidi
8c7936c40c stats: undo parser change from initparam change 2012-01-16 22:37:05 -05:00
Steve Reinhardt
7a3a37307a Alpha: warn_once about broken PAL breakpoints.
A recent changeset (aae12ce9f34c) removed support for
PAL-mode breakpoints in Alpha, since it was awkward
and likely unused.  This patch lets a user know if they
potentially run into this limitation.
2012-01-16 19:01:27 -08:00
Steve Reinhardt
1585cfb5b5 debug: fix AllFlags::disable()
Looks like copy-and-paste bug, apparently I'm the first
person to ever use this since it's plainly broken.
2012-01-16 19:00:59 -08:00
Maximilien Breughe
a7394ad680 inorder: MDU deadlock fix 2012-01-12 10:15:00 -05:00
Deyuan Guo
4a59cf00b4 mips: compatibility between MIPS_SE and cross compiler from CodeSorcery 2012-01-12 09:59:01 -05:00
Deyuan Guo
31b6941a52 mips: Fix bugs in faults.cc/hh and tlb.cc for MIPS_FS 2012-01-12 09:59:00 -05:00
Deyuan Guo
a40ec5671f mips: Fix decoder of two float-convert instructions 2012-01-12 09:58:59 -05:00
Deyuan Guo
7f782a6c79 mips: definition of MIPS64_QNAN in registers.hh 2012-01-12 09:58:58 -05:00
Nilay Vaish
0e6d6a5e25 PerfectCacheMemory: Remove references to CacheMsg
The definition for the class CacheMsg was removed long back. Some declaration
had still survived, which was recently removed. Since the PerfectCacheMemory
class relied on this particular declaration, its absence let to compilation
breaking down. Hence this patch.
2012-01-12 00:35:57 -06:00
Ali Saidi
c40ae2c3fb Packet: Put back part of the assert 2012-01-11 19:27:11 -05:00
Ali Saidi
bc1c21274e Packet: Remove meaningless assert statement 2012-01-11 19:24:13 -05:00
Nilay Vaish
c57dc3ffcb Ruby: Use map option for selecting b/w sparse and memory vector 2012-01-11 13:53:38 -06:00
Nilay Vaish
03229f2575 Config: Add support for restoring using a timing CPU
Currently there is an assumption that restoration from a checkpoint will
happen by first restoring to an atomic CPU and then switching to a timing
CPU. This patch adds support for directly restoring to a timing CPU. It
adds a new option '--restore-with-cpu' which is used to specify the type
of CPU to which the checkpoint should be restored to. It defaults to
'atomic' which was the case before.
2012-01-11 13:50:18 -06:00
Nilay Vaish
bf59a9298f Ruby: Resurrect Cache Warmup Capability
This patch resurrects ruby's cache warmup capability. It essentially
makes use of all the infrastructure that was added to the controllers,
memories and the cache recorder.
2012-01-11 13:48:48 -06:00
Nilay Vaish
3f8065290a Ruby Debug Flags: Remove one, add another
The flag RubyStoreBuffer is being removed, instead RubySystem is being added
2012-01-11 13:42:00 -06:00
Nilay Vaish
2d3cae02f5 Ruby Port: Add a list of cpu ports attached to this port 2012-01-11 13:39:58 -06:00
Nilay Vaish
17fc60ee88 Ruby EventQueue: Remove unused functions 2012-01-11 13:31:04 -06:00
Nilay Vaish
8b3ad17cc3 Ruby Sparse Memory: Add function for collating blocks
This patch adds function to the Sparse Memory so that the blocks can be
recorded in a cache trace. The blocks are added to the cache recorder
which can later write them into a file.
2012-01-11 13:29:54 -06:00
Nilay Vaish
c3109f7775 Ruby: Add infrastructure for recording cache contents
This patch changes CacheRecorder, CacheMemory, CacheControllers
so that the contents of a cache can be recorded for checkpointing
purposes.
2012-01-11 13:29:15 -06:00
Nilay Vaish
ab0347a1c6 Ruby Memory Vector: Functions for collating and populating pages
This patch adds functions to the memory vector class that can be used for
collating memory pages to raw trace and for populating pages from a raw
trace.
2012-01-11 11:46:23 -06:00
Nilay Vaish
bd739a75b9 Ruby: remove the files related to the tracer
The Ruby Tracer is out of date with the changes that are being carried
out to support checkpointing. Hence, it needs to be removed.
2012-01-10 18:35:45 -06:00
Nathan Binkert
a1b4cb58f1 hgfilesize: skip files that have been removed 2012-01-10 22:50:54 -08:00
Nilay Vaish
d272bdb1bf MOESI Hammer: Update regression test output 2012-01-10 17:28:49 -06:00
Nilay Vaish
70cb16ba14 MOESI Hammer: Remove a couple of bugs
A couple of bugs were observed while building checkpointing support in Ruby.
This patch changes transitions to remove those errors.
2012-01-10 17:28:44 -06:00
Nilay Vaish
adff204c97 Sparse Memory: Simplify the structure for an entry
The SparseMemEntry structure includes just one void* pointer. It seems
unnecessary that we have a structure for this. The patch removes the
structure and makes use of a typedef on void* instead.
2012-01-10 10:20:32 -06:00
Ali Saidi
cfa1d26b43 Automated merge with ssh://repo.gem5.org/gem5 2012-01-10 10:18:08 -06:00
Ali Saidi
8f18898e85 config: Fix json output for Python lt 2.6. 2012-01-10 10:17:33 -06:00
Nilay Vaish
9957035a42 DPRINTF: Improve some dprintf messages. 2012-01-10 10:15:02 -06:00
Nilay Vaish
a5a2b9ecbd X86 Regressions: Update stats due to fence instruction 2012-01-10 09:59:01 -06:00
Nilay Vaish
acbc03ae46 X86: Add memory fence to I/O instructions 2012-01-09 20:13:31 -06:00
Nilay Vaish
e4b447754e Config: Remove short option string for cpu type 2012-01-10 06:35:40 -06:00
Anders Handler
b587d511c3 CPU: Remove Alpha-specific PC alignment check. 2012-01-09 20:05:07 -05:00
Ali Saidi
e308208f30 Config: Fix issue with JSON output 2012-01-09 20:04:28 -05:00
Geoffrey Blake
e826d23a2e Packet: Add derived class FunctionalPacket to enable partial functional reads
This adds the derived class FunctionalPacket to fix a long standing
deficiency in the Packet class where it was unable to handle finding data to
partially satisfy a functional access.  Made this a derived class as
functional accesses are used only in certain contexts and to not add any
additional overhead to the existing Packet class.
2012-01-09 18:10:05 -06:00
Dam Sunwoo
bda1125e88 stats: fix Vector2d to display stats correctly when y_subname is not specified.
Vector2d stats with no y_subname were not displayed as the VectorPrint subname was not initialized correctly to reflect the empty field.
2012-01-09 18:08:20 -06:00
Prakash Ramrakhyani
51aa7e4a03 sim: Enable sampling of run-time for code-sections marked using pseudo insts.
This patch adds a mechanism to collect run time samples for specific portions
of a benchmark, using work_begin and work_end pseudo instructions.It also enhances
the histogram stat to report geometric mean.
2012-01-09 18:08:20 -06:00
Ali Saidi
525d1e46dc O3: Remove some asserts that no longer seem to be valid. 2012-01-09 18:08:20 -06:00
Ali Saidi
68d387ec80 config: support outputing a pickle of the configuration tree 2012-01-09 18:08:20 -06:00
Min Kyu Jeong
c94e5256d9 mem: Change DPRINTF prints more useful destination port number.
Old code prints 0 for destination since pkt->getDest() returns 0 for
pkt->getDest() == Packet::Broadcast, which is always true.
2012-01-09 18:08:20 -06:00
Ali Saidi
d2c26f402c O3: Add support of function tracing with O3 CPU. 2012-01-09 18:08:20 -06:00
Ali Saidi
bcb71963eb ARM: Add support for running multiple systems 2012-01-09 18:08:20 -06:00
Ali Saidi
8d757038b5 stats: Update stats for ARM init param changes. 2012-01-09 18:08:20 -06:00
Ali Saidi
80a6907927 ARM: Add support for initparam m5 op 2012-01-09 18:08:20 -06:00
Dam Sunwoo
3f9e352de4 Base: Fixed shift amount in genrand() to work with large numbers
The previous version didn't work correctly with max integer values (2^31-1 for
32-bit, 2^63-1 for 64bit version), causing "shift" to become -1.  For smaller
numbers, it wouldn't have caused functional errors, but would have resulted in
more than necessary loops in the while loop.  Special-cased cases when (max + 1
== 0) to prevent the ceilLog2 functions from failing.
2012-01-09 18:08:20 -06:00
Ali Saidi
6a6d888ab4 cpu2000: Add missing art benchmark to all 2012-01-09 18:08:20 -06:00
Andreas Hansson
59b7cad3ec SWIG: Make gem5 compile and link with swig 2.0.4
To make gem5 compile and run with swig 2.0.4 a few minor fixes are
necessary, the fail label issues by swig must not be treated as an
error by gcc (tested with gcc 4.2.1), and the vector wrappers must
have SWIGPY_SLICE_ARG defined which happens in pycontainer.swg,
included through std_container.i. By adding the aforementioned include
to the vector wrappers everything seems to work.
2012-01-09 18:08:20 -06:00
Andreas Hansson
c2dbfc1d6c MAC: Make gem5 compile and run on MacOSX 10.7.2
Adaptations to make gem5 compile and run on OSX 10.7.2, with a stock
gcc 4.2.1 and the remaining dependencies from macports, i.e. python
2.7,.2 swig 2.0.4, mercurial 2.0. The changes include an adaptation of
the SConstruct to handle non-library linker flags, and Darwin-specific
code to find the memory usage of gem5. A number of Ruby files relied
on ambigious uint (without the 32 suffix) which caused compilation
errors.
2012-01-09 18:08:20 -06:00
Nilay Vaish
4b77278287 Merged with Nate's commit 2012-01-07 07:40:44 -06:00
Nilay Vaish
10c2e8ae9a Ruby Cache: Add param for marking caches as instruction only 2012-01-07 07:38:53 -06:00