Commit graph

2087 commits

Author SHA1 Message Date
Nathan Binkert
d191b14ff7 Pass all scons defined pre-processor macro variables to the
python configuration stuff as environment variables.

sim/pyconfig/SConscript:
    generate a python file that updates the env dict with all
    variables in the CPPDEFINES so the python code can use those
    variables in configuration scripts.

--HG--
extra : convert_revision : 50b0719b044f7adc87ce6ae1571d156ca0c5644c
2005-03-08 23:06:54 -05:00
Nathan Binkert
689f6d1b02 Split the string importer from the rest of the mpy parsing
and importing stuff to avoid some confusion.

sim/pyconfig/SConscript:
    Split the string importer from the rest of the importer code.
    The importer.py code can be embedded like m5config.py
sim/pyconfig/m5config.py:
    import what we need from importer

--HG--
extra : convert_revision : 9d57f43381b55e717b5b10adfb8f0a522280ac57
2005-03-08 22:07:26 -05:00
Kevin Lim
2162b433ad Hand-merge static_inst.hh. These execute functions are within an external file in the new CPU case.
cpu/static_inst.hh:
    Hand-merge.  These execute functions are within an external file in the new CPU case.

--HG--
extra : convert_revision : a34112f471fa31bdd5bb53552ddd704b9571c110
2005-03-08 21:03:20 -05:00
Lisa Hsu
550e6a5010 Merge zizzer:/bk/m5 into zed.eecs.umich.edu:/z/hsul/work/m5/pact05
--HG--
extra : convert_revision : bfaaeebd7ec4ee8ee182909e928581f95ac2af93
2005-03-08 17:38:08 -05:00
Lisa Hsu
91601f4494 make some changes to bonnie - now that the simulator uses more memory the old config didn't fit anymore in pools VM, this does fit.
--HG--
extra : convert_revision : b5fef2896276be675f79791b084ba97dd953d4ca
2005-03-08 17:25:32 -05:00
Nathan Binkert
e05788935b By default, we don't want to be sampling
--HG--
extra : convert_revision : 77c1ec0f2425d24704a587ad2097dfaa6bab4a5c
2005-03-08 12:48:37 -05:00
Nathan Binkert
b9c847563d Fix serialization of the EtherLink object
dev/etherlink.cc:
    - The EtherLink::Link object is no lonver serializable, so it is now
    necessary to prepend the object's name (as determined by the parent)
    to all parameters.
    - Fix the serialization of the LinkDelayEvent so it actually works
    - Rename some variables to make serialization simpler
dev/etherlink.hh:
    - Make the EtherLink::Link object *not* derive from serializeable.
    Instead, the serialize function will take a base name from
    the parent EtherLink object and prepend that base name to each of
    its variable names when serializing.  This is similar to the
    PacketData and PacketFifo classes.
    - Make the EtherLink::Link object keep a pointer to its parent and its
    link number so the LinkDelayEvent can be properly serialized.
    - Rename some variables to make serialization simpler.

--HG--
extra : convert_revision : e5aa54cd9e07b5e033989809100e1640abfb8bed
2005-03-08 12:47:55 -05:00
Nathan Binkert
47dec0f411 Fix the singalling from server to client so that the
benchmark begins properly.

configs/boot/nat-netperf-maerts-client.rcS:
    Fix the echo message
configs/boot/nat-netperf-server.rcS:
    Wait a second before signalling the natbox to make sure it's
    had time to boot.
    Fix echo message.

--HG--
extra : convert_revision : f9d32c98f24b9617ebf917790a4ca554b7b02bba
2005-03-08 12:37:08 -05:00
Nathan Binkert
dedf16a6c6 Only try to import cpt.mpy if we need it.
--HG--
extra : convert_revision : bee61a5026221d47fa00705ccd96595e1415f220
2005-03-08 12:35:17 -05:00
Steve Reinhardt
31d9d3bfe1 Merge zizzer:/bk/m5 into vm1.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision : d5b97b8f5af42115989e7f9f4baa421d61a13b70
2005-03-07 20:56:17 -05:00
Steve Reinhardt
c720389366 More restructuring on Python config code for auto-generating
of Param structs.

objects/CoherenceProtocol.mpy:
objects/Ide.mpy:
    Update for new Enum syntax.
sim/pyconfig/m5config.py:
    More modest restructuring heading for auto-generating
    of param structs.

    - Revamped Enum handling: Enums are regular classes so they
    know their names now (makes it easier for generating C++
    equivalents).

    - Created MetaSimObject class and moved some SimObject-specific
    stuff there (i.e. does not apply to ConfigNodes in general).

--HG--
extra : convert_revision : a93b40dda3b038ebe8bffecac97e9079c22af561
2005-03-07 20:56:02 -05:00
Ron Dreslinski
a99607863f Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : 34c73338a0552b59d4264a1cbc091ad3fc9a3a41
2005-03-07 18:04:49 -05:00
Nathan Binkert
2b89c38172 Make it easier to find a jobfile.
util/pbs/jobfile.py:
    Search for the jobfile in sys.path

--HG--
extra : convert_revision : 50d2c2c13b6b9de4f6bc4e833961e309a98b0d2b
2005-03-07 13:05:41 -05:00
Ron Dreslinski
b290ecf1bb Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : 2b73bffea88cb0e3bb5dff232a15afea8498f4e3
2005-03-07 10:58:15 -05:00
Steve Reinhardt
e5f945967b Sort fields in .ini files generated by Python config
to make it easier to diff output from modified versions.

sim/pyconfig/m5config.py:
    Sort .ini outputs for repeatable results across versions.

--HG--
extra : convert_revision : fa918f2c53635eca3a02ce02af9b320eacd1f057
2005-03-05 19:28:43 -05:00
Lisa Hsu
0804a7530f the client and server aren't rate-matched anymore and the timing of the netcats are off - add a sleep 1 to make it actually work.
--HG--
extra : convert_revision : 3fa730a94d9270945d34061513ab9ce0ab60e7ba
2005-03-05 15:16:29 -05:00
Lisa Hsu
9f8d889f5f fix naming error - before we set CLIENT_MEMORY_SIZE and then when we wanted that value, used CLIENT_MEMSIZE! This caused the NFS failure I was seeing.
--HG--
extra : convert_revision : 845fd7f42d7df771c59ce9a3e77667aff22967c2
2005-03-03 11:43:20 -05:00
Steve Reinhardt
59c041cc1f Make AddToPath and LoadMpyFile visible inside .mpy modules
even though they're not in m5config anymore.

--HG--
extra : convert_revision : 1e49d5a432790ad1c92e47f1b5e6f1b34a422fa0
2005-03-02 15:14:18 -05:00
Ali Saidi
761d104f7b Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : cc69c3009fe34de4b4a658a383ce1d2750f227f6
2005-03-02 00:53:23 -05:00
Steve Reinhardt
50a4ed87d0 Two fixes to try and get TLB miss cost more in line with real platform:
1) Add fault_handler_delay param to FullCPU to wait N cycles after
committing faulting instruction before fetching fault handler.
2) Make hw_rei a serializing instruction (flushes pipe, basically).

arch/alpha/isa_desc:
    Make hw_rei a serializing instruction (guarantees previous insts
    complete before hw_rei will issue).

--HG--
extra : convert_revision : 704cef65b3869be9eee724055cedb22114a78359
2005-03-01 22:32:14 -05:00
Lisa Hsu
d9de7c5783 add the new func unit into the overall list.
--HG--
extra : convert_revision : 2d425ec36de0443e094640fdbbc43754bfc7ed2e
2005-03-01 16:59:42 -05:00
Nathan Binkert
6172f79d9e add some comments.
sim/pyconfig/m5config.py:
    Add some comments to indicate what the decorators mean.

--HG--
extra : convert_revision : fbcbcbe4ad8cd62f2bd12af6b1f141c66752b870
2005-03-01 11:07:44 -05:00
Ali Saidi
0aa624b3f1 Add FUDesc for IprAccess
--HG--
extra : convert_revision : 42c5f8765185aba6a5ca59180d93c579ef759449
2005-03-01 02:08:39 -05:00
Ali Saidi
3d33abe63f Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : 439e7d84ea9a66177b0cc2cab4cd77ecb90aa6fe
2005-03-01 01:16:54 -05:00
Ali Saidi
8268426f30 Updated Monet Configuration and validations tests
--HG--
extra : convert_revision : d58aed18f8f809185ad2639eb92465a5fc6695de
2005-03-01 01:03:37 -05:00
Steve Reinhardt
ddcec6a6f5 Fix stats incompatibility with g++ 3.4.
base/statistics.hh:
    Get rid of operator%... g++ 3.4 complains that this isn't defined
    for doubles (which makes sense).  We never use it anyway.

--HG--
extra : convert_revision : 3ca724e1cc42559226549835f6cd3509308e02ca
2005-03-01 00:41:19 -05:00
Steve Reinhardt
58c29640b7 Add a new operation class for IPR accesses, and have IPR-accessing
instructions use it (instead of IntALU, as before).  Default config
has a single non-pipelined 3-cycle unit.  A bit conservative for the
ev6 (some are 1, some are 3).

arch/alpha/isa_desc:
    Make hw_mfpr and hw_mtpr use IprAccessOp op class.
cpu/full_cpu/op_class.hh:
    Add IprAccess.

--HG--
extra : convert_revision : d4103da3343a586936839e29981fd15d6930d442
2005-03-01 00:39:57 -05:00
Steve Reinhardt
89dc94f3bc Make all StaticInst methods const. StaticInst objects represent a
particular binary machine instruction and should be immutable after
they are constructed.

cpu/simple_cpu/simple_cpu.hh:
    Make StaticInst parameters const.

--HG--
extra : convert_revision : e535fa10c842ce173336323f39d9108c1847f8ba
2005-02-25 21:44:33 -05:00
Kevin Lim
bb41c21d6a Merge ktlim@zizzer.eecs.umich.edu:/bk/m5
into zamp.eecs.umich.edu:/z/ktlim2/m5

--HG--
extra : convert_revision : ba556bbc93275fcd920a0529383fd480bb7218de
2005-02-25 18:01:19 -05:00
Kevin Lim
5c4714c1a9 Initial light-weight OoO CPU checkin, along with gcc-3.4 fixes.
SConscript:
    Include new files.
arch/alpha/isa_desc:
    Make the eaCompPtr and memAccPtr non-const so that execute() can be called on them.
arch/alpha/isa_traits.hh:
    Add enum for total number of data registers.
arch/isa_parser.py:
base/traceflags.py:
    Include new light-weight OoO CPU model.
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
    Changes to abstract more away from the base dyn inst class.
cpu/beta_cpu/2bit_local_pred.cc:
cpu/beta_cpu/2bit_local_pred.hh:
cpu/beta_cpu/tournament_pred.cc:
cpu/beta_cpu/tournament_pred.hh:
    Remove redundant SatCounter class.
cpu/beta_cpu/alpha_dyn_inst.cc:
cpu/beta_cpu/alpha_full_cpu.cc:
cpu/beta_cpu/alpha_full_cpu.hh:
cpu/beta_cpu/bpred_unit.cc:
cpu/beta_cpu/inst_queue.cc:
cpu/beta_cpu/mem_dep_unit.cc:
cpu/beta_cpu/ras.cc:
cpu/beta_cpu/rename_map.cc:
cpu/beta_cpu/rename_map.hh:
cpu/beta_cpu/rob.cc:
    Fix for gcc-3.4
cpu/beta_cpu/alpha_dyn_inst.hh:
cpu/beta_cpu/alpha_dyn_inst_impl.hh:
    Fixes for gcc-3.4.
    Include more variables and functions that are specific to AlphaDynInst which were once in BaseDynInst.
cpu/beta_cpu/alpha_full_cpu_builder.cc:
    Make params match the current params inherited from BaseCPU.
cpu/beta_cpu/alpha_full_cpu_impl.hh:
    Fixes for gcc-3.4
cpu/beta_cpu/full_cpu.cc:
    Use new params pointer in BaseCPU.
    Fix for gcc-3.4.
cpu/beta_cpu/full_cpu.hh:
    Use new params class from BaseCPU.
cpu/beta_cpu/iew_impl.hh:
    Remove unused function.
cpu/simple_cpu/simple_cpu.cc:
    Remove unused global variable.
cpu/static_inst.hh:
    Include OoODynInst for new lightweight OoO CPU

--HG--
extra : convert_revision : 34d9f2e64ca0313377391e0d059bf09c040286fa
2005-02-25 18:00:49 -05:00
Ron Dreslinski
45eb26e67c Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : e7d839327b07393bfcda0b77758b0832eaf1c1c0
2005-02-25 15:12:05 -05:00
Steve Reinhardt
d697721f57 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/z/stever/bk/m5

--HG--
extra : convert_revision : 312d9edd677afef6c973c0cb45af4f827a2b881a
2005-02-25 14:49:39 -05:00
Ron Dreslinski
b5c788bf8a Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : e314c70da4a9f4e05c9a8afec1de85000618ea4d
2005-02-25 14:39:55 -05:00
Nathan Binkert
fbe2d26487 Make the SimConsole device dump its output to a file by default
--HG--
extra : convert_revision : 59cc7c3234d1bc96919d08dc0ec7584d8aff1d6f
2005-02-25 14:38:00 -05:00
Steve Reinhardt
368882a847 Fix timing modeling of faults: functionally the very next instruction after
a faulting instruction is the fault handler, which appears as an independent
instruction to the timing model.  New code will stall fetch and not fetch the
fault handler as long as there's a faulting instruction in the pipeline (i.e.,
the faulting inst has to commit first).

Also fix Ali's bad-address assertion that doesn't apply to full system.

Added some more debugging support in the process.  Hopefully we'll move to the new
cpu model soon and we won't need it anymore.

arch/alpha/alpha_memory.cc:
    Reorganize lookup() so we can trace the result of the lookup as well.
arch/alpha/isa_traits.hh:
    Add NoopMachInst (so we can insert them in the pipeline on ifetch faults).
base/traceflags.py:
    Replace "Dispatch" flag with "Pipeline" (since I added similar
    DPRINTFs in other pipe stages).
cpu/exetrace.cc:
    Change default for printing mis-speculated instructions to true (since
    that's often what we want, and right now you can't change it from the
    command line...).

--HG--
extra : convert_revision : a29a98a373076d62bbbb1d6f40ba51ecae436dbc
2005-02-25 12:41:08 -05:00
Ali Saidi
107233adf1 Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : a63405fac7237014c4ef8b765d31d59d3e1bb500
2005-02-24 15:59:29 -05:00
Ali Saidi
fcf52e8543 if we have an invalid addr and it's not a miss-speculation panic
--HG--
extra : convert_revision : 4c906f68c6168100f7e8f2030b1f957c88900768
2005-02-24 15:57:52 -05:00
Ron Dreslinski
986ff12da1 Fix an error with Exclusive state and timing coherence
Add more useful comments
Add a missing header file

--HG--
extra : convert_revision : 8eeb89de50aa1e11396bbf1d88184a66efd74c44
2005-02-24 13:43:33 -05:00
Ron Dreslinski
e11e26872e Merge out, the L2 is now part of the system, not connected to the processor
--HG--
extra : convert_revision : 996d3085b632e93a88ef111dfe853745d6836147
2005-02-24 12:08:57 -05:00
Ron Dreslinski
d5d41d696c Fix it so that using a sampler works with the occ and ocp configurations.
--HG--
extra : convert_revision : a990503a6c01a156230d8910ad86876d09b4f1b3
2005-02-24 11:43:03 -05:00
Ron Dreslinski
4de9689135 Print an error message if a Checkpoint number was defined, but no checkpoint file was sourced
--HG--
extra : convert_revision : 302c1d6720c0ee24fcfc266cd99f501af734a452
2005-02-24 11:34:58 -05:00
Nathan Binkert
b78b634107 Fix the python panic message
sim/pyconfig/m5config.py:
    Fix panic

--HG--
extra : convert_revision : 56d93398e992ed6e95380f6dcdb61cbee54b3893
2005-02-23 12:26:35 -05:00
Ali Saidi
27a338fe2b Merge zizzer:/bk/m5 into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : f149b8ea762d4a83ef76b3bb95f28e0709391ecf
2005-02-23 11:47:49 -05:00
Ali Saidi
a84159174a added two validation rcs files
--HG--
extra : convert_revision : 19e57e5192be3435d72652e3b36aac3b6e43d81c
2005-02-23 11:46:28 -05:00
Ali Saidi
9ebeb9b2de Added mmap start and end so detailed CPU can know if an access is
in a mmaped region

--HG--
extra : convert_revision : e4ee0520c84d94a0d2e804d02035228766abe71f
2005-02-23 11:45:25 -05:00
Ali Saidi
2298e2ba48 Updated Monet configurations
--HG--
extra : convert_revision : 8f9c875541adcf685effcfb2e138f2dbb8463137
2005-02-23 11:43:18 -05:00
Steve Reinhardt
af33e74638 Small initial steps toward generating C++ param structs
from Python object descriptions.  Mostly cleanup of Python
code based on things I encountered trying to figure out
what's going on.  Main reason I'm committing this now is
to transfer work from my laptop to zizzer.

sim/pyconfig/m5config.py:
    Small steps toward param struct generation: all param
    objects should now have a _cppname attribute that holds
    their corresponding C++ type name.

    Made Param ptype attribute an actual type instead of a
    string.  String is still stored in ptype_string.

    Get rid of AddToPath() and Import() (redundant copies
    are in importer, and that seems to be the more logical
    place for them).

    Add a few comments, delete some unused code.
test/genini.py:
    A few fixes to make the environment more compatible
    with what really happens when configs are executed
    from the m5 binary.

--HG--
extra : convert_revision : 9fc8f72cd0c22ba3deada02f37484787342534f2
2005-02-22 23:53:34 -05:00
Kevin Lim
e8a564b0fd Merge ktlim@zizzer.eecs.umich.edu:/bk/m5
into zamp.eecs.umich.edu:/z/ktlim2/m5

--HG--
extra : convert_revision : 8a558785c64b7c33e64523d3d887ea6e760c3d2b
2005-02-22 16:03:30 -05:00
Ron Dreslinski
3e18c75f00 Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : 0b0583e9404ed922141049f1043e7a149984e567
2005-02-21 18:07:30 -05:00
Nathan Binkert
884a8de509 Set the proper job name for statistics if we're using a JOBNAME
and JOBFILE

--HG--
extra : convert_revision : 44253a39f40efcbbcda226701b0e97d8ea46cf1e
2005-02-21 18:06:09 -05:00