gem5/tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt

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---------- Begin Simulation Statistics ----------
Update refs for CPU clock changes and O3 CPI/IPC calculation updates. tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini: tests/quick/00.hello/ref/mips/linux/simple-atomic/config.out: tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt: tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout: tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini: tests/quick/00.hello/ref/mips/linux/simple-timing/config.out: tests/quick/00.hello/ref/mips/linux/simple-timing/m5stats.txt: tests/quick/00.hello/ref/mips/linux/simple-timing/stdout: tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini: tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.out: tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt: tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout: tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini: tests/quick/00.hello/ref/sparc/linux/simple-timing/config.out: tests/quick/00.hello/ref/sparc/linux/simple-timing/m5stats.txt: tests/quick/00.hello/ref/sparc/linux/simple-timing/stdout: tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini: tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.out: tests/quick/02.insttest/ref/sparc/linux/o3-timing/m5stats.txt: tests/quick/02.insttest/ref/sparc/linux/o3-timing/stderr: tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout: tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini: tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.out: tests/quick/02.insttest/ref/sparc/linux/simple-atomic/m5stats.txt: tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stderr: tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout: tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini: tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.out: tests/quick/02.insttest/ref/sparc/linux/simple-timing/m5stats.txt: tests/quick/02.insttest/ref/sparc/linux/simple-timing/stderr: tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout: Update refs. --HG-- extra : convert_revision : 34a0d18f213386700e2acdd1eb9ebc5fa6daa7f5
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sim_seconds 0.000003 # Number of seconds simulated
sim_ticks 2913500 # Number of ticks simulated
sim_freq 1000000000000 # Frequency of simulated ticks
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host_inst_rate 1129 # Simulator instruction rate (inst/s)
host_tick_rate 564724 # Simulator tick rate (ticks/s)
host_mem_usage 195504 # Number of bytes of host memory used
host_seconds 5.16 # Real time elapsed on the host
sim_insts 5827 # Number of instructions simulated
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system.cpu.dtb.read_hits 0 # DTB read hits
system.cpu.dtb.read_misses 0 # DTB read misses
system.cpu.dtb.read_accesses 0 # DTB read accesses
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system.cpu.dtb.write_hits 0 # DTB write hits
system.cpu.dtb.write_misses 0 # DTB write misses
system.cpu.dtb.write_accesses 0 # DTB write accesses
system.cpu.dtb.hits 0 # DTB hits
system.cpu.dtb.misses 0 # DTB misses
system.cpu.dtb.accesses 0 # DTB accesses
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system.cpu.itb.read_hits 0 # DTB read hits
system.cpu.itb.read_misses 0 # DTB read misses
system.cpu.itb.read_accesses 0 # DTB read accesses
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system.cpu.itb.write_hits 0 # DTB write hits
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.itb.write_accesses 0 # DTB write accesses
system.cpu.itb.hits 0 # DTB hits
system.cpu.itb.misses 0 # DTB misses
system.cpu.itb.accesses 0 # DTB accesses
system.cpu.workload.num_syscalls 8 # Number of system calls
system.cpu.numCycles 5828 # number of cpu cycles simulated
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system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.num_insts 5827 # Number of instructions executed
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system.cpu.num_int_alu_accesses 5126 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 2 # Number of float alu accesses
system.cpu.num_func_calls 194 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 677 # number of instructions that are conditional controls
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system.cpu.num_int_insts 5126 # number of integer instructions
system.cpu.num_fp_insts 2 # number of float instructions
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system.cpu.num_int_register_reads 7300 # number of times the integer registers were read
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system.cpu.num_int_register_writes 3409 # number of times the integer registers were written
system.cpu.num_fp_register_reads 3 # number of times the floating registers were read
system.cpu.num_fp_register_writes 1 # number of times the floating registers were written
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system.cpu.num_mem_refs 2090 # number of memory refs
system.cpu.num_load_insts 1164 # Number of load instructions
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system.cpu.num_store_insts 926 # Number of store instructions
system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_busy_cycles 5828 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
---------- End Simulation Statistics ----------