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gem5/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simout

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ARM/Alpha/Cpu: Stats change for prefetchs to be more like normal loads.
2010-11-08 20:58:24 +01:00
Redirecting stdout to build/ALPHA_FS/tests/fast/quick/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic/simout
Redirecting stderr to build/ALPHA_FS/tests/fast/quick/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic/simerr
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
M5 Simulator System
tests: update tests for slight changes in nsgige posted interrupts
2008-06-18 17:00:53 +02:00
Copyright (c) 2001-2008
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
The Regents of The University of Michigan
All Rights Reserved
ARM/Alpha/Cpu: Stats change for prefetchs to be more like normal loads.
2010-11-08 20:58:24 +01:00
M5 compiled Nov 2 2010 23:00:12
M5 revision 0af3760102ec+ 7713+ default qtip ext/alpha_prefetch.patch tip
M5 started Nov 2 2010 23:11:17
M5 executing on aus-bc2-b15
command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/quick/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic -re tests/run.py build/ALPHA_FS/tests/fast/quick/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic
update_refs for ALPHA_FS with new disk image. tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/m5stats.txt: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stderr: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stdout: update_refs --HG-- extra : convert_revision : 942d42bcd0ab962a7dda897e455329bf15105887
2007-04-23 20:40:46 +02:00
Global frequency set at 1000000000000 ticks per second
ARM/Alpha/Cpu: Stats change for prefetchs to be more like normal loads.
2010-11-08 20:58:24 +01:00
info: kernel located at: /chips/pd/randd/dist/binaries/vmlinux
info: kernel located at: /chips/pd/randd/dist/binaries/vmlinux
Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache.
2008-11-06 17:11:42 +01:00
info: Entering event queue @ 0. Starting simulation...
Make default PhysicalMemory latency slightly more realistic. Also update stats to reflect change.
2008-08-04 00:13:29 +02:00
Exiting @ tick 4300236804024 because checkpoint
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