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gem5/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini

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add a sparc fs regression src/dev/sparc/iob.cc: don't warn on cpu restart/idle/halt stuff tests/SConscript: add sparc target in test Sconscript util/regress: Add SPARC_FS target in regress --HG-- extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
2007-03-04 04:45:26 +01:00
[root]
type=Root
children=system
fixed sttw instruction changes execution trace a bit --HG-- extra : convert_revision : 4bebe6f9acedfd29dfe02f16d4ddb551a2fc7290
2007-04-04 00:28:59 +02:00
dummy=0
add a sparc fs regression src/dev/sparc/iob.cc: don't warn on cpu restart/idle/halt stuff tests/SConscript: add sparc target in test Sconscript util/regress: Add SPARC_FS target in regress --HG-- extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
2007-03-04 04:45:26 +01:00
[system]
type=SparcSystem
children=bridge cpu disk0 hypervisor_desc intrctrl iobus membus nvram partition_desc physmem physmem2 rom t1000
boot_cpu_frequency=1
boot_osflags=a
hypervisor_addr=1099243257856
hypervisor_bin=/dist/m5/system/binaries/q_new.bin
hypervisor_desc=system.hypervisor_desc
hypervisor_desc_addr=133446500352
hypervisor_desc_bin=/dist/m5/system/binaries/1up-hv.bin
init_param=0
kernel=
mem_mode=atomic
nvram=system.nvram
nvram_addr=133429198848
nvram_bin=/dist/m5/system/binaries/nvram1
openboot_addr=1099243716608
openboot_bin=/dist/m5/system/binaries/openboot_new.bin
partition_desc=system.partition_desc
partition_desc_addr=133445976064
partition_desc_bin=/dist/m5/system/binaries/1up-md.bin
physmem=system.physmem
readfile=tests/halt.sh
reset_addr=1099243192320
reset_bin=/dist/m5/system/binaries/reset_new.bin
rom=system.rom
symbolfile=
[system.bridge]
type=Bridge
update all the regresstion tests for release --HG-- extra : convert_revision : 47e420b5b27e196a6e7a6424540923623bb3c4d2
2007-05-16 01:25:35 +02:00
delay=100
Stats: Update the stats. --HG-- extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
2007-08-27 05:27:53 +02:00
filter_ranges_a=
filter_ranges_b=
update all the regresstion tests for release --HG-- extra : convert_revision : 47e420b5b27e196a6e7a6424540923623bb3c4d2
2007-05-16 01:25:35 +02:00
nack_delay=8
req_size_a=16
req_size_b=16
resp_size_a=16
resp_size_b=16
add a sparc fs regression src/dev/sparc/iob.cc: don't warn on cpu restart/idle/halt stuff tests/SConscript: add sparc target in test Sconscript util/regress: Add SPARC_FS target in regress --HG-- extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
2007-03-04 04:45:26 +01:00
write_ack=false
side_a=system.iobus.port[14]
side_b=system.membus.port[2]
[system.cpu]
type=AtomicSimpleCPU
Stats: Update the stats. --HG-- extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
2007-08-27 05:27:53 +02:00
children=dtb itb tracer
add a sparc fs regression src/dev/sparc/iob.cc: don't warn on cpu restart/idle/halt stuff tests/SConscript: add sparc target in test Sconscript util/regress: Add SPARC_FS target in regress --HG-- extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
2007-03-04 04:45:26 +01:00
clock=1
cpu_id=0
defer_registration=false
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu.dtb
function_trace=false
function_trace_start=0
itb=system.cpu.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
phase=0
profile=0
progress_interval=0
simulate_stalls=false
system=system
Stats: Update the stats. --HG-- extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
2007-08-27 05:27:53 +02:00
tracer=system.cpu.tracer
add a sparc fs regression src/dev/sparc/iob.cc: don't warn on cpu restart/idle/halt stuff tests/SConscript: add sparc target in test Sconscript util/regress: Add SPARC_FS target in regress --HG-- extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
2007-03-04 04:45:26 +01:00
width=1
dcache_port=system.membus.port[10]
icache_port=system.membus.port[9]
[system.cpu.dtb]
type=SparcDTB
size=64
[system.cpu.itb]
type=SparcITB
size=64
Stats: Update the stats. --HG-- extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
2007-08-27 05:27:53 +02:00
[system.cpu.tracer]
type=ExeTracer
add a sparc fs regression src/dev/sparc/iob.cc: don't warn on cpu restart/idle/halt stuff tests/SConscript: add sparc target in test Sconscript util/regress: Add SPARC_FS target in regress --HG-- extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
2007-03-04 04:45:26 +01:00
[system.disk0]
type=MmDisk
children=image
image=system.disk0.image
pio_addr=134217728000
pio_latency=2
platform=system.t1000
system=system
pio=system.iobus.port[15]
[system.disk0.image]
type=CowDiskImage
children=child
child=system.disk0.image.child
read_only=false
table_size=65536
[system.disk0.image.child]
type=RawDiskImage
image_file=/dist/m5/system/disks/disk.s10hw2
read_only=true
[system.hypervisor_desc]
type=PhysicalMemory
file=
latency=1
range=133446500352:133446508543
zero=false
port=system.membus.port[7]
[system.intrctrl]
type=IntrControl
sys=system
[system.iobus]
type=Bus
children=responder
update all the regresstion tests for release --HG-- extra : convert_revision : 47e420b5b27e196a6e7a6424540923623bb3c4d2
2007-05-16 01:25:35 +02:00
block_size=64
add a sparc fs regression src/dev/sparc/iob.cc: don't warn on cpu restart/idle/halt stuff tests/SConscript: add sparc target in test Sconscript util/regress: Add SPARC_FS target in regress --HG-- extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
2007-03-04 04:45:26 +01:00
bus_id=0
clock=2
responder_set=false
width=64
default=system.iobus.responder.pio
port=system.t1000.fake_clk.pio system.t1000.fake_membnks.pio system.t1000.fake_l2_1.pio system.t1000.fake_l2_2.pio system.t1000.fake_l2_3.pio system.t1000.fake_l2_4.pio system.t1000.fake_l2esr_1.pio system.t1000.fake_l2esr_2.pio system.t1000.fake_l2esr_3.pio system.t1000.fake_l2esr_4.pio system.t1000.fake_ssi.pio system.t1000.fake_jbi.pio system.t1000.puart0.pio system.t1000.hvuart.pio system.bridge.side_a system.disk0.pio
[system.iobus.responder]
type=IsaFake
pio_addr=0
pio_latency=0
pio_size=8
platform=system.t1000
ret_bad_addr=true
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.default
[system.membus]
type=Bus
children=responder
update all the regresstion tests for release --HG-- extra : convert_revision : 47e420b5b27e196a6e7a6424540923623bb3c4d2
2007-05-16 01:25:35 +02:00
block_size=64
add a sparc fs regression src/dev/sparc/iob.cc: don't warn on cpu restart/idle/halt stuff tests/SConscript: add sparc target in test Sconscript util/regress: Add SPARC_FS target in regress --HG-- extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
2007-03-04 04:45:26 +01:00
bus_id=1
clock=2
responder_set=false
width=64
default=system.membus.responder.pio
Stats: Update the stats. --HG-- extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
2007-08-27 05:27:53 +02:00
port=system.t1000.iob.pio system.t1000.htod.pio system.bridge.side_b system.physmem.port[0] system.physmem2.port[0] system.rom.port[0] system.nvram.port[0] system.hypervisor_desc.port[0] system.partition_desc.port[0] system.cpu.icache_port system.cpu.dcache_port
add a sparc fs regression src/dev/sparc/iob.cc: don't warn on cpu restart/idle/halt stuff tests/SConscript: add sparc target in test Sconscript util/regress: Add SPARC_FS target in regress --HG-- extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
2007-03-04 04:45:26 +01:00
[system.membus.responder]
type=IsaFake
pio_addr=0
pio_latency=0
pio_size=8
platform=system.t1000
ret_bad_addr=true
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.membus.default
[system.nvram]
type=PhysicalMemory
file=
latency=1
range=133429198848:133429207039
zero=false
port=system.membus.port[6]
[system.partition_desc]
type=PhysicalMemory
file=
latency=1
range=133445976064:133445984255
zero=false
port=system.membus.port[8]
[system.physmem]
type=PhysicalMemory
file=
latency=1
range=1048576:68157439
zero=true
port=system.membus.port[3]
[system.physmem2]
type=PhysicalMemory
file=
latency=1
range=2147483648:2415919103
zero=true
port=system.membus.port[4]
[system.rom]
type=PhysicalMemory
file=
latency=1
range=1099243192320:1099251580927
zero=false
port=system.membus.port[5]
[system.t1000]
type=T1000
children=fake_clk fake_jbi fake_l2_1 fake_l2_2 fake_l2_3 fake_l2_4 fake_l2esr_1 fake_l2esr_2 fake_l2esr_3 fake_l2esr_4 fake_membnks fake_ssi hconsole htod hvuart iob pconsole puart0
intrctrl=system.intrctrl
system=system
[system.t1000.fake_clk]
type=IsaFake
pio_addr=644245094400
pio_latency=2
pio_size=4294967296
platform=system.t1000
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[0]
[system.t1000.fake_jbi]
type=IsaFake
pio_addr=549755813888
pio_latency=2
pio_size=4294967296
platform=system.t1000
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[11]
[system.t1000.fake_l2_1]
type=IsaFake
pio_addr=725849473024
pio_latency=2
pio_size=8
platform=system.t1000
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=1
ret_data8=255
system=system
update_data=true
warn_access=
pio=system.iobus.port[2]
[system.t1000.fake_l2_2]
type=IsaFake
pio_addr=725849473088
pio_latency=2
pio_size=8
platform=system.t1000
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=1
ret_data8=255
system=system
update_data=true
warn_access=
pio=system.iobus.port[3]
[system.t1000.fake_l2_3]
type=IsaFake
pio_addr=725849473152
pio_latency=2
pio_size=8
platform=system.t1000
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=1
ret_data8=255
system=system
update_data=true
warn_access=
pio=system.iobus.port[4]
[system.t1000.fake_l2_4]
type=IsaFake
pio_addr=725849473216
pio_latency=2
pio_size=8
platform=system.t1000
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=1
ret_data8=255
system=system
update_data=true
warn_access=
pio=system.iobus.port[5]
[system.t1000.fake_l2esr_1]
type=IsaFake
pio_addr=734439407616
pio_latency=2
pio_size=8
platform=system.t1000
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=0
ret_data8=255
system=system
update_data=true
warn_access=
pio=system.iobus.port[6]
[system.t1000.fake_l2esr_2]
type=IsaFake
pio_addr=734439407680
pio_latency=2
pio_size=8
platform=system.t1000
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=0
ret_data8=255
system=system
update_data=true
warn_access=
pio=system.iobus.port[7]
[system.t1000.fake_l2esr_3]
type=IsaFake
pio_addr=734439407744
pio_latency=2
pio_size=8
platform=system.t1000
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=0
ret_data8=255
system=system
update_data=true
warn_access=
pio=system.iobus.port[8]
[system.t1000.fake_l2esr_4]
type=IsaFake
pio_addr=734439407808
pio_latency=2
pio_size=8
platform=system.t1000
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=0
ret_data8=255
system=system
update_data=true
warn_access=
pio=system.iobus.port[9]
[system.t1000.fake_membnks]
type=IsaFake
pio_addr=648540061696
pio_latency=2
pio_size=16384
platform=system.t1000
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=0
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[1]
[system.t1000.fake_ssi]
type=IsaFake
pio_addr=1095216660480
pio_latency=2
pio_size=268435456
platform=system.t1000
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
pio=system.iobus.port[10]
[system.t1000.hconsole]
type=SimConsole
append_name=true
intr_control=system.intrctrl
number=0
output=console
port=3456
[system.t1000.htod]
type=DumbTOD
pio_addr=1099255906296
pio_latency=2
platform=system.t1000
system=system
Stats: Update the stats. --HG-- extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
2007-08-27 05:27:53 +02:00
time=Thu Jan 1 00:00:00 2009
add a sparc fs regression src/dev/sparc/iob.cc: don't warn on cpu restart/idle/halt stuff tests/SConscript: add sparc target in test Sconscript util/regress: Add SPARC_FS target in regress --HG-- extra : convert_revision : 37fa21700ec4c350d87ca9723bc3359feb81c50a
2007-03-04 04:45:26 +01:00
pio=system.membus.port[1]
[system.t1000.hvuart]
type=Uart8250
pio_addr=1099255955456
pio_latency=2
platform=system.t1000
sim_console=system.t1000.hconsole
system=system
pio=system.iobus.port[13]
[system.t1000.iob]
type=Iob
pio_latency=2
platform=system.t1000
system=system
pio=system.membus.port[0]
[system.t1000.pconsole]
type=SimConsole
append_name=true
intr_control=system.intrctrl
number=0
output=console
port=3456
[system.t1000.puart0]
type=Uart8250
pio_addr=133412421632
pio_latency=2
platform=system.t1000
sim_console=system.t1000.pconsole
system=system
pio=system.iobus.port[12]
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