2006-02-10 05:02:38 +01:00
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// -*- mode:c++ -*-
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// Copyright (c) 2003-2005 The Regents of The University of Michigan
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met: redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer;
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// redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution;
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// neither the name of the copyright holders nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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2006-06-01 01:26:56 +02:00
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//
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// Authors: Steve Reinhardt
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2006-02-10 05:02:38 +01:00
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2006-05-29 05:26:15 +02:00
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////////////////////////////////////////////////////////////////////
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//
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// Floating-point instructions
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//
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2010-12-20 22:24:40 +01:00
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// Note that many FP-type instructions which do not support all the
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// various rounding & trapping modes use the simpler format
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// BasicOperateWithNopCheck.
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2006-05-29 05:26:15 +02:00
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//
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2006-02-10 05:02:38 +01:00
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output exec {{
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/// Check "FP enabled" machine status bit. Called when executing any FP
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/// instruction in full-system mode.
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Changed the fault enum into a class, and fixed everything up to work with it. Next, the faults need to be pulled out of all the other code so that they are only used to communicate between the CPU and the ISA.
SConscript:
The new faults.cc file in sim allocates the system wide faults. When these faults are generated through a function interface in the ISA, this file may go away.
arch/alpha/alpha_memory.cc:
Changed Fault to Fault * and took the underscores out of fault names.
arch/alpha/alpha_memory.hh:
Changed Fault to Fault *. Also, added an include for the alpha faults.
arch/alpha/ev5.cc:
Changed the fault_addr array into a fault_addr function. Once all of the faults can be expected to have the same type, fault_addr can go away completely and the info it provided will come from the fault itself. Also, Fault was changed to Fault *, and underscores were taken out of fault names.
arch/alpha/isa/decoder.isa:
Changed Fault to Fault * and took the underscores out fault names.
arch/alpha/isa/fp.isa:
Changed Fault to Fault *, and took the underscores out of fault names.
arch/alpha/isa/main.isa:
Changed Fault to Fault *, removed underscores from fault names, and made an include of the alpha faults show up in all the generated files.
arch/alpha/isa/mem.isa:
Changed Fault to Fault * and removed underscores from fault names.
arch/alpha/isa/unimp.isa:
arch/alpha/isa/unknown.isa:
cpu/exec_context.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
dev/alpha_console.cc:
dev/ide_ctrl.cc:
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
Changed Fault to Fault *, and removed underscores from fault names.
arch/alpha/isa_traits.hh:
Changed the include of arch/alpha/faults.hh to sim/faults.hh, since the alpha faults weren't needed.
cpu/base_dyn_inst.cc:
Changed Fault to Fault *, and removed underscores from fault names. This file probably shouldn't use the Unimplemented Opcode fault.
cpu/base_dyn_inst.hh:
Changed Fault to Fault * and took the underscores out of the fault names.
cpu/exec_context.cc:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/fetch.hh:
dev/alpha_console.hh:
dev/baddev.hh:
dev/ide_ctrl.hh:
dev/isa_fake.hh:
dev/ns_gige.hh:
dev/pciconfigall.hh:
dev/sinic.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
dev/uart.hh:
dev/uart8250.hh:
Changed Fault to Fault *.
cpu/o3/alpha_cpu.hh:
Changed Fault to Fault *, removed underscores from fault names.
cpu/o3/alpha_cpu_impl.hh:
Changed Fault to Fault *, removed underscores from fault names, and changed the fault_addr array to the fault_addr function. Once all faults are from the ISA, this function will probably go away.
cpu/o3/commit_impl.hh:
cpu/o3/fetch_impl.hh:
dev/baddev.cc:
Changed Fault to Fault *, and removed underscores from the fault names.
cpu/o3/regfile.hh:
Added an include for the alpha specific faults which will hopefully go away once the ipr stuff is moved, changed Fault to Fault *, and removed the underscores from fault names.
cpu/simple/cpu.hh:
Changed Fault to Fault *
dev/ns_gige.cc:
Changed Fault to Fault *, and removdd underscores from fault names.
dev/sinic.cc:
Changed Fault to Fault *, and removed the underscores from fault names.
dev/uart8250.cc:
Chanted Fault to Fault *, and removed underscores from fault names.
kern/kernel_stats.cc:
Removed underscores from fault names, and from NumFaults.
kern/kernel_stats.hh:
Changed the predeclaration of Fault from an enum to a class, and changd the "fault" function to work with the classes instead of the enum. Once there are no system wide faults anymore, this code will simplify back to something like it was originally.
sim/faults.cc:
This allocates the system wide faults.
sim/faults.hh:
This declares the system wide faults.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Removed the underscores from fault names.
--HG--
rename : arch/alpha/faults.cc => sim/faults.cc
rename : arch/alpha/faults.hh => sim/faults.hh
extra : convert_revision : 253d39258237333ae8ec4d8047367cb3ea68569d
2006-02-16 07:22:51 +01:00
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/// @retval Full-system mode: NoFault if FP is enabled, FenFault
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/// if not. Non-full-system mode: always returns NoFault.
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arch: teach ISA parser how to split code across files
This patch encompasses several interrelated and interdependent changes
to the ISA generation step. The end goal is to reduce the size of the
generated compilation units for instruction execution and decoding so
that batch compilation can proceed with all CPUs active without
exhausting physical memory.
The ISA parser (src/arch/isa_parser.py) has been improved so that it can
accept 'split [output_type];' directives at the top level of the grammar
and 'split(output_type)' python calls within 'exec {{ ... }}' blocks.
This has the effect of "splitting" the files into smaller compilation
units. I use air-quotes around "splitting" because the files themselves
are not split, but preprocessing directives are inserted to have the same
effect.
Architecturally, the ISA parser has had some changes in how it works.
In general, it emits code sooner. It doesn't generate per-CPU files,
and instead defers to the C preprocessor to create the duplicate copies
for each CPU type. Likewise there are more files emitted and the C
preprocessor does more substitution that used to be done by the ISA parser.
Finally, the build system (SCons) needs to be able to cope with a
dynamic list of source files coming out of the ISA parser. The changes
to the SCons{cript,truct} files support this. In broad strokes, the
targets requested on the command line are hidden from SCons until all
the build dependencies are determined, otherwise it would try, realize
it can't reach the goal, and terminate in failure. Since build steps
(i.e. running the ISA parser) must be taken to determine the file list,
several new build stages have been inserted at the very start of the
build. First, the build dependencies from the ISA parser will be emitted
to arch/$ISA/generated/inc.d, which is then read by a new SCons builder
to finalize the dependencies. (Once inc.d exists, the ISA parser will not
need to be run to complete this step.) Once the dependencies are known,
the 'Environments' are made by the makeEnv() function. This function used
to be called before the build began but now happens during the build.
It is easy to see that this step is quite slow; this is a known issue
and it's important to realize that it was already slow, but there was
no obvious cause to attribute it to since nothing was displayed to the
terminal. Since new steps that used to be performed serially are now in a
potentially-parallel build phase, the pathname handling in the SCons scripts
has been tightened up to deal with chdir() race conditions. In general,
pathnames are computed earlier and more likely to be stored, passed around,
and processed as absolute paths rather than relative paths. In the end,
some of these issues had to be fixed by inserting serializing dependencies
in the build.
Minor note:
For the null ISA, we just provide a dummy inc.d so SCons is never
compelled to try to generate it. While it seems slightly wrong to have
anything in src/arch/*/generated (i.e. a non-generated 'generated' file),
it's by far the simplest solution.
2014-05-10 00:58:47 +02:00
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inline Fault checkFpEnableFault(CPU_EXEC_CONTEXT *xc)
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2006-02-10 05:02:38 +01:00
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{
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2010-12-20 22:24:40 +01:00
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Fault fault = NoFault; // dummy... this ipr access should not fault
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2011-09-30 09:27:16 +02:00
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if (FullSystem && !ICSR_FPE(xc->readMiscReg(IPR_ICSR))) {
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2006-02-24 07:51:45 +01:00
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fault = new FloatEnableFault;
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2006-02-10 05:02:38 +01:00
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}
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return fault;
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}
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}};
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output header {{
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/**
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* Base class for general floating-point instructions. Includes
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* support for various Alpha rounding and trapping modes. Only FP
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* instructions that require this support are derived from this
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* class; the rest derive directly from AlphaStaticInst.
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*/
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class AlphaFP : public AlphaStaticInst
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{
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public:
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/// Alpha FP rounding modes.
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enum RoundingMode {
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2010-12-20 22:24:40 +01:00
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Chopped = 0, ///< round toward zero
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2006-02-10 05:02:38 +01:00
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Minus_Infinity = 1, ///< round toward minus infinity
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2010-12-20 22:24:40 +01:00
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Normal = 2, ///< round to nearest (default)
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Dynamic = 3, ///< use FPCR setting (in instruction)
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Plus_Infinity = 3 ///< round to plus inifinity (in FPCR)
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2006-02-10 05:02:38 +01:00
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};
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/// Alpha FP trapping modes.
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/// For instructions that produce integer results, the
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/// "Underflow Enable" modes really mean "Overflow Enable", and
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/// the assembly modifier is V rather than U.
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enum TrappingMode {
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/// default: nothing enabled
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2010-12-20 22:24:40 +01:00
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Imprecise = 0, ///< no modifier
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2006-02-10 05:02:38 +01:00
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/// underflow/overflow traps enabled, inexact disabled
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2010-12-20 22:24:40 +01:00
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Underflow_Imprecise = 1, ///< /U or /V
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Underflow_Precise = 5, ///< /SU or /SV
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2006-02-10 05:02:38 +01:00
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/// underflow/overflow and inexact traps enabled
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Underflow_Inexact_Precise = 7 ///< /SUI or /SVI
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};
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protected:
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/// Map Alpha rounding mode to C99 constants from <fenv.h>.
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static const int alphaToC99RoundingMode[];
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/// Map enum RoundingMode values to disassembly suffixes.
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static const char *roundingModeSuffix[];
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/// Map enum TrappingMode values to FP disassembly suffixes.
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static const char *fpTrappingModeSuffix[];
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/// Map enum TrappingMode values to integer disassembly suffixes.
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static const char *intTrappingModeSuffix[];
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/// This instruction's rounding mode.
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RoundingMode roundingMode;
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/// This instruction's trapping mode.
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TrappingMode trappingMode;
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/// Have we warned about this instruction's unsupported
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/// rounding mode (if applicable)?
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mutable bool warnedOnRounding;
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/// Have we warned about this instruction's unsupported
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/// trapping mode (if applicable)?
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mutable bool warnedOnTrapping;
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/// Constructor
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2006-03-03 21:28:25 +01:00
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AlphaFP(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
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2006-02-10 05:02:38 +01:00
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: AlphaStaticInst(mnem, _machInst, __opClass),
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roundingMode((enum RoundingMode)FP_ROUNDMODE),
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trappingMode((enum TrappingMode)FP_TRAPMODE),
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warnedOnRounding(false),
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warnedOnTrapping(false)
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{
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}
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int getC99RoundingMode(uint64_t fpcr_val) const;
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// This differs from the AlphaStaticInst version only in
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// printing suffixes for non-default rounding & trapping modes.
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std::string
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generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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};
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}};
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output decoder {{
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int
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AlphaFP::getC99RoundingMode(uint64_t fpcr_val) const
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{
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if (roundingMode == Dynamic) {
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return alphaToC99RoundingMode[bits(fpcr_val, 59, 58)];
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}
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else {
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return alphaToC99RoundingMode[roundingMode];
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}
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}
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std::string
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AlphaFP::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::string mnem_str(mnemonic);
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#ifndef SS_COMPATIBLE_DISASSEMBLY
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std::string suffix("");
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2013-10-15 20:22:43 +02:00
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suffix += ((_destRegIdx[0] >= FP_Reg_Base)
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2006-02-10 05:02:38 +01:00
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? fpTrappingModeSuffix[trappingMode]
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: intTrappingModeSuffix[trappingMode]);
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suffix += roundingModeSuffix[roundingMode];
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if (suffix != "") {
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mnem_str = csprintf("%s/%s", mnemonic, suffix);
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}
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#endif
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std::stringstream ss;
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ccprintf(ss, "%-10s ", mnem_str.c_str());
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// just print the first two source regs... if there's
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// a third one, it's a read-modify-write dest (Rc),
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// e.g. for CMOVxx
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if (_numSrcRegs > 0) {
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printReg(ss, _srcRegIdx[0]);
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}
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if (_numSrcRegs > 1) {
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ss << ",";
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printReg(ss, _srcRegIdx[1]);
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}
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// just print the first dest... if there's a second one,
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// it's generally implicit
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if (_numDestRegs > 0) {
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if (_numSrcRegs > 0)
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ss << ",";
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printReg(ss, _destRegIdx[0]);
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}
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return ss.str();
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}
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const int AlphaFP::alphaToC99RoundingMode[] = {
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2010-12-20 22:24:40 +01:00
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M5_FE_TOWARDZERO, // Chopped
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M5_FE_DOWNWARD, // Minus_Infinity
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M5_FE_TONEAREST, // Normal
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M5_FE_UPWARD // Dynamic in inst, Plus_Infinity in FPCR
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2006-02-10 05:02:38 +01:00
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};
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const char *AlphaFP::roundingModeSuffix[] = { "c", "m", "", "d" };
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// mark invalid trapping modes, but don't fail on them, because
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// you could decode anything on a misspeculated path
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const char *AlphaFP::fpTrappingModeSuffix[] =
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{ "", "u", "INVTM2", "INVTM3", "INVTM4", "su", "INVTM6", "sui" };
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const char *AlphaFP::intTrappingModeSuffix[] =
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{ "", "v", "INVTM2", "INVTM3", "INVTM4", "sv", "INVTM6", "svi" };
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}};
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// FP instruction class execute method template. Handles non-standard
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// rounding modes.
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def template FloatingPointExecute {{
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arch: teach ISA parser how to split code across files
This patch encompasses several interrelated and interdependent changes
to the ISA generation step. The end goal is to reduce the size of the
generated compilation units for instruction execution and decoding so
that batch compilation can proceed with all CPUs active without
exhausting physical memory.
The ISA parser (src/arch/isa_parser.py) has been improved so that it can
accept 'split [output_type];' directives at the top level of the grammar
and 'split(output_type)' python calls within 'exec {{ ... }}' blocks.
This has the effect of "splitting" the files into smaller compilation
units. I use air-quotes around "splitting" because the files themselves
are not split, but preprocessing directives are inserted to have the same
effect.
Architecturally, the ISA parser has had some changes in how it works.
In general, it emits code sooner. It doesn't generate per-CPU files,
and instead defers to the C preprocessor to create the duplicate copies
for each CPU type. Likewise there are more files emitted and the C
preprocessor does more substitution that used to be done by the ISA parser.
Finally, the build system (SCons) needs to be able to cope with a
dynamic list of source files coming out of the ISA parser. The changes
to the SCons{cript,truct} files support this. In broad strokes, the
targets requested on the command line are hidden from SCons until all
the build dependencies are determined, otherwise it would try, realize
it can't reach the goal, and terminate in failure. Since build steps
(i.e. running the ISA parser) must be taken to determine the file list,
several new build stages have been inserted at the very start of the
build. First, the build dependencies from the ISA parser will be emitted
to arch/$ISA/generated/inc.d, which is then read by a new SCons builder
to finalize the dependencies. (Once inc.d exists, the ISA parser will not
need to be run to complete this step.) Once the dependencies are known,
the 'Environments' are made by the makeEnv() function. This function used
to be called before the build began but now happens during the build.
It is easy to see that this step is quite slow; this is a known issue
and it's important to realize that it was already slow, but there was
no obvious cause to attribute it to since nothing was displayed to the
terminal. Since new steps that used to be performed serially are now in a
potentially-parallel build phase, the pathname handling in the SCons scripts
has been tightened up to deal with chdir() race conditions. In general,
pathnames are computed earlier and more likely to be stored, passed around,
and processed as absolute paths rather than relative paths. In the end,
some of these issues had to be fixed by inserting serializing dependencies
in the build.
Minor note:
For the null ISA, we just provide a dummy inc.d so SCons is never
compelled to try to generate it. While it seems slightly wrong to have
anything in src/arch/*/generated (i.e. a non-generated 'generated' file),
it's by far the simplest solution.
2014-05-10 00:58:47 +02:00
|
|
|
Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
|
2006-02-10 05:02:38 +01:00
|
|
|
Trace::InstRecord *traceData) const
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|
|
|
{
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|
|
if (trappingMode != Imprecise && !warnedOnTrapping) {
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warn("%s: non-standard trapping mode not supported",
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generateDisassembly(0, NULL));
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warnedOnTrapping = true;
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}
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|
|
2006-02-22 02:10:40 +01:00
|
|
|
Fault fault = NoFault;
|
2006-02-10 05:02:38 +01:00
|
|
|
|
|
|
|
%(fp_enable_check)s;
|
|
|
|
%(op_decl)s;
|
|
|
|
%(op_rd)s;
|
|
|
|
#if USE_FENV
|
|
|
|
if (roundingMode == Normal) {
|
|
|
|
%(code)s;
|
|
|
|
} else {
|
2007-04-21 23:50:47 +02:00
|
|
|
m5_fesetround(getC99RoundingMode(
|
2010-12-08 01:19:57 +01:00
|
|
|
xc->readMiscReg(MISCREG_FPCR)));
|
2006-02-10 05:02:38 +01:00
|
|
|
%(code)s;
|
2007-04-21 23:50:47 +02:00
|
|
|
m5_fesetround(M5_FE_TONEAREST);
|
2006-02-10 05:02:38 +01:00
|
|
|
}
|
|
|
|
#else
|
|
|
|
if (roundingMode != Normal && !warnedOnRounding) {
|
|
|
|
warn("%s: non-standard rounding mode not supported",
|
|
|
|
generateDisassembly(0, NULL));
|
|
|
|
warnedOnRounding = true;
|
|
|
|
}
|
|
|
|
%(code)s;
|
|
|
|
#endif
|
|
|
|
|
Changed the fault enum into a class, and fixed everything up to work with it. Next, the faults need to be pulled out of all the other code so that they are only used to communicate between the CPU and the ISA.
SConscript:
The new faults.cc file in sim allocates the system wide faults. When these faults are generated through a function interface in the ISA, this file may go away.
arch/alpha/alpha_memory.cc:
Changed Fault to Fault * and took the underscores out of fault names.
arch/alpha/alpha_memory.hh:
Changed Fault to Fault *. Also, added an include for the alpha faults.
arch/alpha/ev5.cc:
Changed the fault_addr array into a fault_addr function. Once all of the faults can be expected to have the same type, fault_addr can go away completely and the info it provided will come from the fault itself. Also, Fault was changed to Fault *, and underscores were taken out of fault names.
arch/alpha/isa/decoder.isa:
Changed Fault to Fault * and took the underscores out fault names.
arch/alpha/isa/fp.isa:
Changed Fault to Fault *, and took the underscores out of fault names.
arch/alpha/isa/main.isa:
Changed Fault to Fault *, removed underscores from fault names, and made an include of the alpha faults show up in all the generated files.
arch/alpha/isa/mem.isa:
Changed Fault to Fault * and removed underscores from fault names.
arch/alpha/isa/unimp.isa:
arch/alpha/isa/unknown.isa:
cpu/exec_context.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
dev/alpha_console.cc:
dev/ide_ctrl.cc:
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
Changed Fault to Fault *, and removed underscores from fault names.
arch/alpha/isa_traits.hh:
Changed the include of arch/alpha/faults.hh to sim/faults.hh, since the alpha faults weren't needed.
cpu/base_dyn_inst.cc:
Changed Fault to Fault *, and removed underscores from fault names. This file probably shouldn't use the Unimplemented Opcode fault.
cpu/base_dyn_inst.hh:
Changed Fault to Fault * and took the underscores out of the fault names.
cpu/exec_context.cc:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/fetch.hh:
dev/alpha_console.hh:
dev/baddev.hh:
dev/ide_ctrl.hh:
dev/isa_fake.hh:
dev/ns_gige.hh:
dev/pciconfigall.hh:
dev/sinic.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
dev/uart.hh:
dev/uart8250.hh:
Changed Fault to Fault *.
cpu/o3/alpha_cpu.hh:
Changed Fault to Fault *, removed underscores from fault names.
cpu/o3/alpha_cpu_impl.hh:
Changed Fault to Fault *, removed underscores from fault names, and changed the fault_addr array to the fault_addr function. Once all faults are from the ISA, this function will probably go away.
cpu/o3/commit_impl.hh:
cpu/o3/fetch_impl.hh:
dev/baddev.cc:
Changed Fault to Fault *, and removed underscores from the fault names.
cpu/o3/regfile.hh:
Added an include for the alpha specific faults which will hopefully go away once the ipr stuff is moved, changed Fault to Fault *, and removed the underscores from fault names.
cpu/simple/cpu.hh:
Changed Fault to Fault *
dev/ns_gige.cc:
Changed Fault to Fault *, and removdd underscores from fault names.
dev/sinic.cc:
Changed Fault to Fault *, and removed the underscores from fault names.
dev/uart8250.cc:
Chanted Fault to Fault *, and removed underscores from fault names.
kern/kernel_stats.cc:
Removed underscores from fault names, and from NumFaults.
kern/kernel_stats.hh:
Changed the predeclaration of Fault from an enum to a class, and changd the "fault" function to work with the classes instead of the enum. Once there are no system wide faults anymore, this code will simplify back to something like it was originally.
sim/faults.cc:
This allocates the system wide faults.
sim/faults.hh:
This declares the system wide faults.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Removed the underscores from fault names.
--HG--
rename : arch/alpha/faults.cc => sim/faults.cc
rename : arch/alpha/faults.hh => sim/faults.hh
extra : convert_revision : 253d39258237333ae8ec4d8047367cb3ea68569d
2006-02-16 07:22:51 +01:00
|
|
|
if (fault == NoFault) {
|
2006-02-10 05:02:38 +01:00
|
|
|
%(op_wb)s;
|
|
|
|
}
|
|
|
|
|
|
|
|
return fault;
|
|
|
|
}
|
|
|
|
}};
|
|
|
|
|
|
|
|
// FP instruction class execute method template where no dynamic
|
|
|
|
// rounding mode control is needed. Like BasicExecute, but includes
|
|
|
|
// check & warning for non-standard trapping mode.
|
|
|
|
def template FPFixedRoundingExecute {{
|
arch: teach ISA parser how to split code across files
This patch encompasses several interrelated and interdependent changes
to the ISA generation step. The end goal is to reduce the size of the
generated compilation units for instruction execution and decoding so
that batch compilation can proceed with all CPUs active without
exhausting physical memory.
The ISA parser (src/arch/isa_parser.py) has been improved so that it can
accept 'split [output_type];' directives at the top level of the grammar
and 'split(output_type)' python calls within 'exec {{ ... }}' blocks.
This has the effect of "splitting" the files into smaller compilation
units. I use air-quotes around "splitting" because the files themselves
are not split, but preprocessing directives are inserted to have the same
effect.
Architecturally, the ISA parser has had some changes in how it works.
In general, it emits code sooner. It doesn't generate per-CPU files,
and instead defers to the C preprocessor to create the duplicate copies
for each CPU type. Likewise there are more files emitted and the C
preprocessor does more substitution that used to be done by the ISA parser.
Finally, the build system (SCons) needs to be able to cope with a
dynamic list of source files coming out of the ISA parser. The changes
to the SCons{cript,truct} files support this. In broad strokes, the
targets requested on the command line are hidden from SCons until all
the build dependencies are determined, otherwise it would try, realize
it can't reach the goal, and terminate in failure. Since build steps
(i.e. running the ISA parser) must be taken to determine the file list,
several new build stages have been inserted at the very start of the
build. First, the build dependencies from the ISA parser will be emitted
to arch/$ISA/generated/inc.d, which is then read by a new SCons builder
to finalize the dependencies. (Once inc.d exists, the ISA parser will not
need to be run to complete this step.) Once the dependencies are known,
the 'Environments' are made by the makeEnv() function. This function used
to be called before the build began but now happens during the build.
It is easy to see that this step is quite slow; this is a known issue
and it's important to realize that it was already slow, but there was
no obvious cause to attribute it to since nothing was displayed to the
terminal. Since new steps that used to be performed serially are now in a
potentially-parallel build phase, the pathname handling in the SCons scripts
has been tightened up to deal with chdir() race conditions. In general,
pathnames are computed earlier and more likely to be stored, passed around,
and processed as absolute paths rather than relative paths. In the end,
some of these issues had to be fixed by inserting serializing dependencies
in the build.
Minor note:
For the null ISA, we just provide a dummy inc.d so SCons is never
compelled to try to generate it. While it seems slightly wrong to have
anything in src/arch/*/generated (i.e. a non-generated 'generated' file),
it's by far the simplest solution.
2014-05-10 00:58:47 +02:00
|
|
|
Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
|
2006-02-10 05:02:38 +01:00
|
|
|
Trace::InstRecord *traceData) const
|
|
|
|
{
|
|
|
|
if (trappingMode != Imprecise && !warnedOnTrapping) {
|
|
|
|
warn("%s: non-standard trapping mode not supported",
|
|
|
|
generateDisassembly(0, NULL));
|
|
|
|
warnedOnTrapping = true;
|
|
|
|
}
|
|
|
|
|
2006-02-22 02:10:40 +01:00
|
|
|
Fault fault = NoFault;
|
2006-02-10 05:02:38 +01:00
|
|
|
|
|
|
|
%(fp_enable_check)s;
|
|
|
|
%(op_decl)s;
|
|
|
|
%(op_rd)s;
|
|
|
|
%(code)s;
|
|
|
|
|
Changed the fault enum into a class, and fixed everything up to work with it. Next, the faults need to be pulled out of all the other code so that they are only used to communicate between the CPU and the ISA.
SConscript:
The new faults.cc file in sim allocates the system wide faults. When these faults are generated through a function interface in the ISA, this file may go away.
arch/alpha/alpha_memory.cc:
Changed Fault to Fault * and took the underscores out of fault names.
arch/alpha/alpha_memory.hh:
Changed Fault to Fault *. Also, added an include for the alpha faults.
arch/alpha/ev5.cc:
Changed the fault_addr array into a fault_addr function. Once all of the faults can be expected to have the same type, fault_addr can go away completely and the info it provided will come from the fault itself. Also, Fault was changed to Fault *, and underscores were taken out of fault names.
arch/alpha/isa/decoder.isa:
Changed Fault to Fault * and took the underscores out fault names.
arch/alpha/isa/fp.isa:
Changed Fault to Fault *, and took the underscores out of fault names.
arch/alpha/isa/main.isa:
Changed Fault to Fault *, removed underscores from fault names, and made an include of the alpha faults show up in all the generated files.
arch/alpha/isa/mem.isa:
Changed Fault to Fault * and removed underscores from fault names.
arch/alpha/isa/unimp.isa:
arch/alpha/isa/unknown.isa:
cpu/exec_context.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
dev/alpha_console.cc:
dev/ide_ctrl.cc:
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
Changed Fault to Fault *, and removed underscores from fault names.
arch/alpha/isa_traits.hh:
Changed the include of arch/alpha/faults.hh to sim/faults.hh, since the alpha faults weren't needed.
cpu/base_dyn_inst.cc:
Changed Fault to Fault *, and removed underscores from fault names. This file probably shouldn't use the Unimplemented Opcode fault.
cpu/base_dyn_inst.hh:
Changed Fault to Fault * and took the underscores out of the fault names.
cpu/exec_context.cc:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/fetch.hh:
dev/alpha_console.hh:
dev/baddev.hh:
dev/ide_ctrl.hh:
dev/isa_fake.hh:
dev/ns_gige.hh:
dev/pciconfigall.hh:
dev/sinic.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
dev/uart.hh:
dev/uart8250.hh:
Changed Fault to Fault *.
cpu/o3/alpha_cpu.hh:
Changed Fault to Fault *, removed underscores from fault names.
cpu/o3/alpha_cpu_impl.hh:
Changed Fault to Fault *, removed underscores from fault names, and changed the fault_addr array to the fault_addr function. Once all faults are from the ISA, this function will probably go away.
cpu/o3/commit_impl.hh:
cpu/o3/fetch_impl.hh:
dev/baddev.cc:
Changed Fault to Fault *, and removed underscores from the fault names.
cpu/o3/regfile.hh:
Added an include for the alpha specific faults which will hopefully go away once the ipr stuff is moved, changed Fault to Fault *, and removed the underscores from fault names.
cpu/simple/cpu.hh:
Changed Fault to Fault *
dev/ns_gige.cc:
Changed Fault to Fault *, and removdd underscores from fault names.
dev/sinic.cc:
Changed Fault to Fault *, and removed the underscores from fault names.
dev/uart8250.cc:
Chanted Fault to Fault *, and removed underscores from fault names.
kern/kernel_stats.cc:
Removed underscores from fault names, and from NumFaults.
kern/kernel_stats.hh:
Changed the predeclaration of Fault from an enum to a class, and changd the "fault" function to work with the classes instead of the enum. Once there are no system wide faults anymore, this code will simplify back to something like it was originally.
sim/faults.cc:
This allocates the system wide faults.
sim/faults.hh:
This declares the system wide faults.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Removed the underscores from fault names.
--HG--
rename : arch/alpha/faults.cc => sim/faults.cc
rename : arch/alpha/faults.hh => sim/faults.hh
extra : convert_revision : 253d39258237333ae8ec4d8047367cb3ea68569d
2006-02-16 07:22:51 +01:00
|
|
|
if (fault == NoFault) {
|
2006-02-10 05:02:38 +01:00
|
|
|
%(op_wb)s;
|
|
|
|
}
|
|
|
|
|
|
|
|
return fault;
|
|
|
|
}
|
|
|
|
}};
|
|
|
|
|
|
|
|
def template FloatingPointDecode {{
|
|
|
|
{
|
|
|
|
AlphaStaticInst *i = new %(class_name)s(machInst);
|
|
|
|
if (FC == 31) {
|
|
|
|
i = makeNop(i);
|
|
|
|
}
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
}};
|
|
|
|
|
|
|
|
// General format for floating-point operate instructions:
|
|
|
|
// - Checks trapping and rounding mode flags. Trapping modes
|
|
|
|
// currently unimplemented (will fail).
|
|
|
|
// - Generates NOP if FC == 31.
|
|
|
|
def format FloatingPointOperate(code, *opt_args) {{
|
2006-12-18 04:27:50 +01:00
|
|
|
iop = InstObjParams(name, Name, 'AlphaFP', code, opt_args)
|
2006-02-10 05:02:38 +01:00
|
|
|
decode_block = FloatingPointDecode.subst(iop)
|
|
|
|
header_output = BasicDeclare.subst(iop)
|
|
|
|
decoder_output = BasicConstructor.subst(iop)
|
|
|
|
exec_output = FloatingPointExecute.subst(iop)
|
|
|
|
}};
|
|
|
|
|
|
|
|
// Special format for cvttq where rounding mode is pre-decoded
|
|
|
|
def format FPFixedRounding(code, class_suffix, *opt_args) {{
|
|
|
|
Name += class_suffix
|
2006-12-18 04:27:50 +01:00
|
|
|
iop = InstObjParams(name, Name, 'AlphaFP', code, opt_args)
|
2006-02-10 05:02:38 +01:00
|
|
|
decode_block = FloatingPointDecode.subst(iop)
|
|
|
|
header_output = BasicDeclare.subst(iop)
|
|
|
|
decoder_output = BasicConstructor.subst(iop)
|
|
|
|
exec_output = FPFixedRoundingExecute.subst(iop)
|
|
|
|
}};
|
|
|
|
|