gem5/src/arch
Andreas Hansson 2475862747 arch,x86,mem: Dynamically determine the ISA for Ruby store check
This patch makes the memory system ISA-agnostic by enabling the Ruby
Sequencer to dynamically determine if it has to do a store check. To
enable this check, the ISA is encoded as an enum, and the system
is able to provide the ISA to the Sequencer at run time.

--HG--
rename : src/arch/x86/insts/microldstop.hh => src/arch/x86/ldstflags.hh
2014-10-16 05:49:44 -04:00
..
alpha arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
arm arm: Add helper methods to setup architected PMU events 2014-10-16 05:49:42 -04:00
generic arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
mips arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
null arch: Cleanup unused ISA traits constants 2014-09-03 07:42:21 -04:00
power arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
sparc arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
x86 arch,x86,mem: Dynamically determine the ISA for Ruby store check 2014-10-16 05:49:44 -04:00
isa_parser.py scons: Address issues related to gcc 4.9.1 2014-09-27 09:08:34 -04:00
micro_asm.py scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access 2009-09-22 15:24:16 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript arch, cpu: Factor out the ExecContext into a proper base class 2014-09-03 07:42:22 -04:00