2010-06-07 00:39:10 +02:00
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Redirecting stdout to build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/o3-timing/simout
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Redirecting stderr to build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/o3-timing/simerr
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2008-07-22 23:00:18 +02:00
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M5 Simulator System
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Copyright (c) 2001-2008
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The Regents of The University of Michigan
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All Rights Reserved
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2010-06-07 00:39:10 +02:00
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M5 compiled Jun 6 2010 04:01:36
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M5 revision ba1a0193c050 7448 default tip
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M5 started Jun 6 2010 04:04:37
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2010-05-14 05:45:59 +02:00
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M5 executing on zizzer
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2009-04-22 07:55:52 +02:00
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command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/o3-timing -re tests/run.py build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/o3-timing
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2008-07-22 23:00:18 +02:00
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Global frequency set at 1000000000000 ticks per second
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2008-11-06 17:11:42 +01:00
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info: Entering event queue @ 0. Starting simulation...
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2007-04-09 09:59:56 +02:00
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Begining test of difficult SPARC instructions...
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LDSTUB: Passed
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SWAP: Passed
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CAS FAIL: Passed
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CAS WORK: Passed
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CASX FAIL: Passed
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CASX WORK: Passed
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LDTX: Passed
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LDTW: Passed
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STTW: Passed
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Done
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2010-05-14 05:45:59 +02:00
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Exiting @ tick 27640500 because target called exit()
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