2006-08-17 00:48:15 +02:00
|
|
|
[root]
|
|
|
|
type=Root
|
|
|
|
children=system
|
2007-04-23 18:13:19 +02:00
|
|
|
dummy=0
|
2006-08-17 00:48:15 +02:00
|
|
|
|
|
|
|
[system]
|
|
|
|
type=System
|
|
|
|
children=cpu membus physmem
|
|
|
|
mem_mode=atomic
|
|
|
|
physmem=system.physmem
|
|
|
|
|
|
|
|
[system.cpu]
|
|
|
|
type=AtomicSimpleCPU
|
2008-07-22 23:00:18 +02:00
|
|
|
children=dtb itb tlb tracer workload
|
|
|
|
CP0_Config=0
|
|
|
|
CP0_Config1=0
|
|
|
|
CP0_Config1_C2=false
|
|
|
|
CP0_Config1_CA=false
|
|
|
|
CP0_Config1_DA=0
|
|
|
|
CP0_Config1_DL=0
|
|
|
|
CP0_Config1_DS=0
|
|
|
|
CP0_Config1_EP=false
|
|
|
|
CP0_Config1_FP=false
|
|
|
|
CP0_Config1_IA=0
|
|
|
|
CP0_Config1_IL=0
|
|
|
|
CP0_Config1_IS=0
|
|
|
|
CP0_Config1_M=0
|
|
|
|
CP0_Config1_MD=false
|
|
|
|
CP0_Config1_MMU=0
|
|
|
|
CP0_Config1_PC=false
|
|
|
|
CP0_Config1_WR=false
|
|
|
|
CP0_Config2=0
|
|
|
|
CP0_Config2_M=false
|
|
|
|
CP0_Config2_SA=0
|
|
|
|
CP0_Config2_SL=0
|
|
|
|
CP0_Config2_SS=0
|
|
|
|
CP0_Config2_SU=0
|
|
|
|
CP0_Config2_TA=0
|
|
|
|
CP0_Config2_TL=0
|
|
|
|
CP0_Config2_TS=0
|
|
|
|
CP0_Config2_TU=0
|
|
|
|
CP0_Config3=0
|
|
|
|
CP0_Config3_DSPP=false
|
|
|
|
CP0_Config3_LPA=false
|
|
|
|
CP0_Config3_M=false
|
|
|
|
CP0_Config3_MT=false
|
|
|
|
CP0_Config3_SM=false
|
|
|
|
CP0_Config3_SP=false
|
|
|
|
CP0_Config3_TL=false
|
|
|
|
CP0_Config3_VEIC=false
|
|
|
|
CP0_Config3_VInt=false
|
|
|
|
CP0_Config_AR=0
|
|
|
|
CP0_Config_AT=0
|
|
|
|
CP0_Config_BE=0
|
|
|
|
CP0_Config_MT=0
|
|
|
|
CP0_Config_VI=0
|
|
|
|
CP0_EBase_CPUNum=0
|
|
|
|
CP0_IntCtl_IPPCI=0
|
|
|
|
CP0_IntCtl_IPTI=0
|
|
|
|
CP0_PRId=0
|
|
|
|
CP0_PRId_CompanyID=0
|
|
|
|
CP0_PRId_CompanyOptions=0
|
|
|
|
CP0_PRId_ProcessorID=1
|
|
|
|
CP0_PRId_Revision=0
|
|
|
|
CP0_PerfCtr_M=false
|
|
|
|
CP0_PerfCtr_W=false
|
|
|
|
CP0_SrsCtl_HSS=0
|
|
|
|
CP0_WatchHi_M=false
|
|
|
|
UnifiedTLB=true
|
2007-04-23 18:13:19 +02:00
|
|
|
clock=500
|
2006-10-08 23:07:23 +02:00
|
|
|
cpu_id=0
|
2006-08-17 00:48:15 +02:00
|
|
|
defer_registration=false
|
2007-08-27 05:27:53 +02:00
|
|
|
dtb=system.cpu.dtb
|
2006-08-17 00:48:15 +02:00
|
|
|
function_trace=false
|
|
|
|
function_trace_start=0
|
2007-08-27 05:27:53 +02:00
|
|
|
itb=system.cpu.itb
|
2006-08-17 00:48:15 +02:00
|
|
|
max_insts_all_threads=0
|
|
|
|
max_insts_any_thread=0
|
|
|
|
max_loads_all_threads=0
|
|
|
|
max_loads_any_thread=0
|
2007-04-23 18:13:19 +02:00
|
|
|
phase=0
|
2006-10-08 23:07:23 +02:00
|
|
|
progress_interval=0
|
2008-07-22 23:00:18 +02:00
|
|
|
simulate_data_stalls=false
|
|
|
|
simulate_inst_stalls=false
|
2006-08-17 00:48:15 +02:00
|
|
|
system=system
|
2008-07-22 23:00:18 +02:00
|
|
|
tlb=system.cpu.tlb
|
2007-08-04 00:04:30 +02:00
|
|
|
tracer=system.cpu.tracer
|
2006-08-17 00:48:15 +02:00
|
|
|
width=1
|
|
|
|
workload=system.cpu.workload
|
2006-09-05 22:24:47 +02:00
|
|
|
dcache_port=system.membus.port[2]
|
|
|
|
icache_port=system.membus.port[1]
|
2006-08-17 00:48:15 +02:00
|
|
|
|
2007-08-27 05:27:53 +02:00
|
|
|
[system.cpu.dtb]
|
|
|
|
type=MipsDTB
|
2008-07-22 23:00:18 +02:00
|
|
|
size=64
|
2007-08-27 05:27:53 +02:00
|
|
|
|
|
|
|
[system.cpu.itb]
|
|
|
|
type=MipsITB
|
2008-07-22 23:00:18 +02:00
|
|
|
size=64
|
|
|
|
|
|
|
|
[system.cpu.tlb]
|
|
|
|
type=MipsUTB
|
|
|
|
size=64
|
2007-08-27 05:27:53 +02:00
|
|
|
|
2007-08-04 00:04:30 +02:00
|
|
|
[system.cpu.tracer]
|
|
|
|
type=ExeTracer
|
|
|
|
|
2006-08-17 00:48:15 +02:00
|
|
|
[system.cpu.workload]
|
|
|
|
type=LiveProcess
|
|
|
|
cmd=hello
|
2007-04-23 18:13:19 +02:00
|
|
|
cwd=
|
2006-10-08 23:07:23 +02:00
|
|
|
egid=100
|
2006-08-17 00:48:15 +02:00
|
|
|
env=
|
2006-10-08 23:07:23 +02:00
|
|
|
euid=100
|
2007-08-27 05:27:53 +02:00
|
|
|
executable=/dist/m5/regression/test-progs/hello/bin/mips/linux/hello
|
2006-10-08 23:07:23 +02:00
|
|
|
gid=100
|
2006-08-17 00:48:15 +02:00
|
|
|
input=cin
|
2008-07-22 23:00:18 +02:00
|
|
|
max_stack_size=67108864
|
2006-08-17 00:48:15 +02:00
|
|
|
output=cout
|
2006-10-08 23:07:23 +02:00
|
|
|
pid=100
|
|
|
|
ppid=99
|
2008-07-22 23:00:18 +02:00
|
|
|
simpoint=0
|
2006-08-17 00:48:15 +02:00
|
|
|
system=system
|
2006-10-08 23:07:23 +02:00
|
|
|
uid=100
|
2006-08-17 00:48:15 +02:00
|
|
|
|
|
|
|
[system.membus]
|
|
|
|
type=Bus
|
2007-05-16 01:25:35 +02:00
|
|
|
block_size=64
|
2006-08-17 00:48:15 +02:00
|
|
|
bus_id=0
|
2006-10-10 01:55:49 +02:00
|
|
|
clock=1000
|
2008-07-22 23:00:18 +02:00
|
|
|
header_cycles=1
|
2007-04-23 18:13:19 +02:00
|
|
|
responder_set=false
|
2006-10-10 01:55:49 +02:00
|
|
|
width=64
|
2007-08-04 00:04:30 +02:00
|
|
|
port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
|
2006-08-17 00:48:15 +02:00
|
|
|
|
|
|
|
[system.physmem]
|
|
|
|
type=PhysicalMemory
|
|
|
|
file=
|
|
|
|
latency=1
|
2008-07-22 23:00:18 +02:00
|
|
|
latency_var=0
|
|
|
|
null=false
|
2006-08-18 06:17:21 +02:00
|
|
|
range=0:134217727
|
2007-04-23 18:13:19 +02:00
|
|
|
zero=false
|
2006-09-05 22:24:47 +02:00
|
|
|
port=system.membus.port[0]
|
2006-08-17 00:48:15 +02:00
|
|
|
|