gem5/src/arch/alpha/regfile.hh

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/*
* Copyright (c) 2003-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Gabe Black
*/
Changed the floating point register file into a class with appropriate accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt. arch/alpha/arguments.cc: Renamed readFloatRegInt to readFloatRegBits arch/alpha/ev5.cc: Removed the Double from setFloatRegDouble arch/alpha/registerfile.hh: Changed the floating point register file from a union of arrays to a class with appropriate accessor functions. The interface is necessary for SPARC. arch/alpha/types.hh: Changed the FloatReg type from a union of uint64_t and double to a double, and defined a new type FloatRegBits which is a uint64_t and is used to return the bits which compose a floating point register rather than the value of the register. arch/isa_parser.py: Adjusted the makeRead and makeWrite functions to generate the new versions of readFloatReg and setFloatReg. base/remote_gdb.cc: kern/tru64/tru64.hh: Replaced setFloatRegInt with setFloatRegBits cpu/cpu_exec_context.cc: Removed the duplicated code for setting the floating point registers, and renamed the function to setFloatRegBits and readFloatRegBits. cpu/cpu_exec_context.hh: cpu/exec_context.hh: cpu/o3/alpha_cpu_impl.hh: cpu/o3/alpha_dyn_inst.hh: cpu/o3/cpu.cc: cpu/o3/cpu.hh: cpu/o3/regfile.hh: cpu/ozone/cpu.hh: cpu/simple/cpu.hh: Implemented the new versions of the floating point read and set functions. cpu/simple/cpu.cc: Replaced setFloatRegDouble with setFloatReg --HG-- extra : convert_revision : 3dad06224723137f6033c335fb8f6395636767f2
2006-03-14 21:55:00 +01:00
#ifndef __ARCH_ALPHA_REGFILE_HH__
#define __ARCH_ALPHA_REGFILE_HH__
#include "arch/alpha/isa_traits.hh"
#include "arch/alpha/floatregfile.hh"
#include "arch/alpha/intregfile.hh"
#include "arch/alpha/miscregfile.hh"
#include "arch/alpha/types.hh"
#include "sim/faults.hh"
#include <string>
//XXX These should be implemented by someone who knows the alpha stuff better
class Checkpoint;
Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh. Further renames/reorganization will be coming shortly; what is currently CPUExecContext (the old ExecContext from m5) will be renamed to SimpleThread or something similar. src/arch/alpha/arguments.cc: src/arch/alpha/arguments.hh: src/arch/alpha/ev5.cc: src/arch/alpha/faults.cc: src/arch/alpha/faults.hh: src/arch/alpha/freebsd/system.cc: src/arch/alpha/freebsd/system.hh: src/arch/alpha/isa/branch.isa: src/arch/alpha/isa/decoder.isa: src/arch/alpha/isa/main.isa: src/arch/alpha/linux/process.cc: src/arch/alpha/linux/system.cc: src/arch/alpha/linux/system.hh: src/arch/alpha/linux/threadinfo.hh: src/arch/alpha/process.cc: src/arch/alpha/regfile.hh: src/arch/alpha/stacktrace.cc: src/arch/alpha/stacktrace.hh: src/arch/alpha/tlb.cc: src/arch/alpha/tlb.hh: src/arch/alpha/tru64/process.cc: src/arch/alpha/tru64/system.cc: src/arch/alpha/tru64/system.hh: src/arch/alpha/utility.hh: src/arch/alpha/vtophys.cc: src/arch/alpha/vtophys.hh: src/arch/mips/faults.cc: src/arch/mips/faults.hh: src/arch/mips/isa_traits.cc: src/arch/mips/isa_traits.hh: src/arch/mips/linux/process.cc: src/arch/mips/process.cc: src/arch/mips/regfile/float_regfile.hh: src/arch/mips/regfile/int_regfile.hh: src/arch/mips/regfile/misc_regfile.hh: src/arch/mips/regfile/regfile.hh: src/arch/mips/stacktrace.hh: src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: src/arch/sparc/isa_traits.hh: src/arch/sparc/linux/process.cc: src/arch/sparc/linux/process.hh: src/arch/sparc/process.cc: src/arch/sparc/regfile.hh: src/arch/sparc/solaris/process.cc: src/arch/sparc/stacktrace.hh: src/arch/sparc/ua2005.cc: src/arch/sparc/utility.hh: src/arch/sparc/vtophys.cc: src/arch/sparc/vtophys.hh: src/base/remote_gdb.cc: src/base/remote_gdb.hh: src/cpu/base.cc: src/cpu/base.hh: src/cpu/base_dyn_inst.hh: src/cpu/checker/cpu.cc: src/cpu/checker/cpu.hh: src/cpu/checker/exec_context.hh: src/cpu/cpu_exec_context.cc: src/cpu/cpu_exec_context.hh: src/cpu/cpuevent.cc: src/cpu/cpuevent.hh: src/cpu/exetrace.hh: src/cpu/intr_control.cc: src/cpu/memtest/memtest.hh: src/cpu/o3/alpha_cpu.hh: src/cpu/o3/alpha_cpu_impl.hh: src/cpu/o3/alpha_dyn_inst_impl.hh: src/cpu/o3/commit.hh: src/cpu/o3/commit_impl.hh: src/cpu/o3/cpu.cc: src/cpu/o3/cpu.hh: src/cpu/o3/fetch_impl.hh: src/cpu/o3/regfile.hh: src/cpu/o3/thread_state.hh: src/cpu/ozone/back_end.hh: src/cpu/ozone/cpu.hh: src/cpu/ozone/cpu_impl.hh: src/cpu/ozone/front_end.hh: src/cpu/ozone/front_end_impl.hh: src/cpu/ozone/inorder_back_end.hh: src/cpu/ozone/lw_back_end.hh: src/cpu/ozone/lw_back_end_impl.hh: src/cpu/ozone/lw_lsq.hh: src/cpu/ozone/lw_lsq_impl.hh: src/cpu/ozone/thread_state.hh: src/cpu/pc_event.cc: src/cpu/pc_event.hh: src/cpu/profile.cc: src/cpu/profile.hh: src/cpu/quiesce_event.cc: src/cpu/quiesce_event.hh: src/cpu/simple/atomic.cc: src/cpu/simple/base.cc: src/cpu/simple/base.hh: src/cpu/simple/timing.cc: src/cpu/static_inst.cc: src/cpu/static_inst.hh: src/cpu/thread_state.hh: src/dev/alpha_console.cc: src/dev/ns_gige.cc: src/dev/sinic.cc: src/dev/tsunami_cchip.cc: src/kern/kernel_stats.cc: src/kern/kernel_stats.hh: src/kern/linux/events.cc: src/kern/linux/events.hh: src/kern/system_events.cc: src/kern/system_events.hh: src/kern/tru64/dump_mbuf.cc: src/kern/tru64/tru64.hh: src/kern/tru64/tru64_events.cc: src/kern/tru64/tru64_events.hh: src/mem/vport.cc: src/mem/vport.hh: src/sim/faults.cc: src/sim/faults.hh: src/sim/process.cc: src/sim/process.hh: src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: src/sim/syscall_emul.cc: src/sim/syscall_emul.hh: src/sim/system.cc: src/cpu/thread_context.hh: src/sim/system.hh: src/sim/vptr.hh: Change ExecContext to ThreadContext. --HG-- rename : src/cpu/exec_context.hh => src/cpu/thread_context.hh extra : convert_revision : 108bb97d15a114a565a2a6a23faa554f4e2fd77e
2006-06-06 23:32:21 +02:00
class ThreadContext;
namespace AlphaISA
{
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
class RegFile {
protected:
Addr pc; // program counter
Addr npc; // next-cycle program counter
Addr nnpc;
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
public:
Addr readPC()
{
return pc;
}
void setPC(Addr val)
{
pc = val;
}
Addr readNextPC()
{
return npc;
}
void setNextPC(Addr val)
{
npc = val;
}
Addr readNextNPC()
{
return nnpc;
}
void setNextNPC(Addr val)
{
nnpc = val;
}
protected:
IntRegFile intRegFile; // (signed) integer register file
FloatRegFile floatRegFile; // floating point register file
MiscRegFile miscRegFile; // control register file
public:
#if FULL_SYSTEM
int intrflag; // interrupt flag
inline int instAsid()
{ return miscRegFile.getInstAsid(); }
inline int dataAsid()
{ return miscRegFile.getDataAsid(); }
#endif // FULL_SYSTEM
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
void clear()
{
intRegFile.clear();
floatRegFile.clear();
miscRegFile.clear();
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
}
MiscReg readMiscReg(int miscReg)
{
return miscRegFile.readReg(miscReg);
}
MiscReg readMiscRegWithEffect(int miscReg, ThreadContext *tc)
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
{
return miscRegFile.readRegWithEffect(miscReg, tc);
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
}
void setMiscReg(int miscReg, const MiscReg &val)
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
{
miscRegFile.setReg(miscReg, val);
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
}
void setMiscRegWithEffect(int miscReg, const MiscReg &val,
Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh. Further renames/reorganization will be coming shortly; what is currently CPUExecContext (the old ExecContext from m5) will be renamed to SimpleThread or something similar. src/arch/alpha/arguments.cc: src/arch/alpha/arguments.hh: src/arch/alpha/ev5.cc: src/arch/alpha/faults.cc: src/arch/alpha/faults.hh: src/arch/alpha/freebsd/system.cc: src/arch/alpha/freebsd/system.hh: src/arch/alpha/isa/branch.isa: src/arch/alpha/isa/decoder.isa: src/arch/alpha/isa/main.isa: src/arch/alpha/linux/process.cc: src/arch/alpha/linux/system.cc: src/arch/alpha/linux/system.hh: src/arch/alpha/linux/threadinfo.hh: src/arch/alpha/process.cc: src/arch/alpha/regfile.hh: src/arch/alpha/stacktrace.cc: src/arch/alpha/stacktrace.hh: src/arch/alpha/tlb.cc: src/arch/alpha/tlb.hh: src/arch/alpha/tru64/process.cc: src/arch/alpha/tru64/system.cc: src/arch/alpha/tru64/system.hh: src/arch/alpha/utility.hh: src/arch/alpha/vtophys.cc: src/arch/alpha/vtophys.hh: src/arch/mips/faults.cc: src/arch/mips/faults.hh: src/arch/mips/isa_traits.cc: src/arch/mips/isa_traits.hh: src/arch/mips/linux/process.cc: src/arch/mips/process.cc: src/arch/mips/regfile/float_regfile.hh: src/arch/mips/regfile/int_regfile.hh: src/arch/mips/regfile/misc_regfile.hh: src/arch/mips/regfile/regfile.hh: src/arch/mips/stacktrace.hh: src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: src/arch/sparc/isa_traits.hh: src/arch/sparc/linux/process.cc: src/arch/sparc/linux/process.hh: src/arch/sparc/process.cc: src/arch/sparc/regfile.hh: src/arch/sparc/solaris/process.cc: src/arch/sparc/stacktrace.hh: src/arch/sparc/ua2005.cc: src/arch/sparc/utility.hh: src/arch/sparc/vtophys.cc: src/arch/sparc/vtophys.hh: src/base/remote_gdb.cc: src/base/remote_gdb.hh: src/cpu/base.cc: src/cpu/base.hh: src/cpu/base_dyn_inst.hh: src/cpu/checker/cpu.cc: src/cpu/checker/cpu.hh: src/cpu/checker/exec_context.hh: src/cpu/cpu_exec_context.cc: src/cpu/cpu_exec_context.hh: src/cpu/cpuevent.cc: src/cpu/cpuevent.hh: src/cpu/exetrace.hh: src/cpu/intr_control.cc: src/cpu/memtest/memtest.hh: src/cpu/o3/alpha_cpu.hh: src/cpu/o3/alpha_cpu_impl.hh: src/cpu/o3/alpha_dyn_inst_impl.hh: src/cpu/o3/commit.hh: src/cpu/o3/commit_impl.hh: src/cpu/o3/cpu.cc: src/cpu/o3/cpu.hh: src/cpu/o3/fetch_impl.hh: src/cpu/o3/regfile.hh: src/cpu/o3/thread_state.hh: src/cpu/ozone/back_end.hh: src/cpu/ozone/cpu.hh: src/cpu/ozone/cpu_impl.hh: src/cpu/ozone/front_end.hh: src/cpu/ozone/front_end_impl.hh: src/cpu/ozone/inorder_back_end.hh: src/cpu/ozone/lw_back_end.hh: src/cpu/ozone/lw_back_end_impl.hh: src/cpu/ozone/lw_lsq.hh: src/cpu/ozone/lw_lsq_impl.hh: src/cpu/ozone/thread_state.hh: src/cpu/pc_event.cc: src/cpu/pc_event.hh: src/cpu/profile.cc: src/cpu/profile.hh: src/cpu/quiesce_event.cc: src/cpu/quiesce_event.hh: src/cpu/simple/atomic.cc: src/cpu/simple/base.cc: src/cpu/simple/base.hh: src/cpu/simple/timing.cc: src/cpu/static_inst.cc: src/cpu/static_inst.hh: src/cpu/thread_state.hh: src/dev/alpha_console.cc: src/dev/ns_gige.cc: src/dev/sinic.cc: src/dev/tsunami_cchip.cc: src/kern/kernel_stats.cc: src/kern/kernel_stats.hh: src/kern/linux/events.cc: src/kern/linux/events.hh: src/kern/system_events.cc: src/kern/system_events.hh: src/kern/tru64/dump_mbuf.cc: src/kern/tru64/tru64.hh: src/kern/tru64/tru64_events.cc: src/kern/tru64/tru64_events.hh: src/mem/vport.cc: src/mem/vport.hh: src/sim/faults.cc: src/sim/faults.hh: src/sim/process.cc: src/sim/process.hh: src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: src/sim/syscall_emul.cc: src/sim/syscall_emul.hh: src/sim/system.cc: src/cpu/thread_context.hh: src/sim/system.hh: src/sim/vptr.hh: Change ExecContext to ThreadContext. --HG-- rename : src/cpu/exec_context.hh => src/cpu/thread_context.hh extra : convert_revision : 108bb97d15a114a565a2a6a23faa554f4e2fd77e
2006-06-06 23:32:21 +02:00
ThreadContext * tc)
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
{
miscRegFile.setRegWithEffect(miscReg, val, tc);
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
}
FloatReg readFloatReg(int floatReg)
{
return floatRegFile.d[floatReg];
}
FloatReg readFloatReg(int floatReg, int width)
{
return readFloatReg(floatReg);
}
FloatRegBits readFloatRegBits(int floatReg)
{
return floatRegFile.q[floatReg];
}
FloatRegBits readFloatRegBits(int floatReg, int width)
{
return readFloatRegBits(floatReg);
}
void setFloatReg(int floatReg, const FloatReg &val)
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
{
floatRegFile.d[floatReg] = val;
}
void setFloatReg(int floatReg, const FloatReg &val, int width)
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
{
setFloatReg(floatReg, val);
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
}
void setFloatRegBits(int floatReg, const FloatRegBits &val)
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
{
floatRegFile.q[floatReg] = val;
}
void setFloatRegBits(int floatReg, const FloatRegBits &val, int width)
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
{
setFloatRegBits(floatReg, val);
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
}
IntReg readIntReg(int intReg)
{
return intRegFile.readReg(intReg);
}
void setIntReg(int intReg, const IntReg &val)
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
{
intRegFile.setReg(intReg, val);
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
}
void serialize(std::ostream &os);
void unserialize(Checkpoint *cp, const std::string &section);
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
void changeContext(RegContextParam param, RegContextVal val)
Enable register windows. arch/alpha/isa_traits.hh: arch/mips/isa_traits.cc: Turned the integer register file into a class instead of a typedef to an array. arch/alpha/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. arch/mips/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also moved a "using namespace" into the namespace definition. arch/sparc/isa_traits.hh: Turned the integer register file into a class instead of a typedef to an array. Also "fixed" the max number of src and dest regs. They may need to be even larger. arch/sparc/regfile.hh: Changed the integer register file into a class instead of a typedef to an array. Also put the parts of the register file, ie the int, float, and misc register files, pc, npc, and nnpc, behind accessor functions. Added a changeContext function, and ContextParam and ContextVal types, so that things like the register window can be changed through call backs. Created setCWP and setAltGlobals functions for the IntRegFile. cpu/cpu_exec_context.hh: Used the accessor functions for the register file, and added a changeRegFileContext function to call back into the RegFile. Used the RegFile clear function rather than memsetting it to 0. cpu/exec_context.hh: Added the changeRegFileContext function. cpu/exetrace.cc: Use the TheISA::NumIntRegs constant, and use readReg now that the integer register file is a class instead of an array. cpu/exetrace.hh: Get the address of the regs object, now that it isn't an array. --HG-- extra : convert_revision : ea2dd81be1c2e66b3c684af319eb58f8a77fd49c
2006-04-06 20:47:03 +02:00
{
//This would be an alternative place to call/implement
//the swapPALShadow function
}
};
Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh. Further renames/reorganization will be coming shortly; what is currently CPUExecContext (the old ExecContext from m5) will be renamed to SimpleThread or something similar. src/arch/alpha/arguments.cc: src/arch/alpha/arguments.hh: src/arch/alpha/ev5.cc: src/arch/alpha/faults.cc: src/arch/alpha/faults.hh: src/arch/alpha/freebsd/system.cc: src/arch/alpha/freebsd/system.hh: src/arch/alpha/isa/branch.isa: src/arch/alpha/isa/decoder.isa: src/arch/alpha/isa/main.isa: src/arch/alpha/linux/process.cc: src/arch/alpha/linux/system.cc: src/arch/alpha/linux/system.hh: src/arch/alpha/linux/threadinfo.hh: src/arch/alpha/process.cc: src/arch/alpha/regfile.hh: src/arch/alpha/stacktrace.cc: src/arch/alpha/stacktrace.hh: src/arch/alpha/tlb.cc: src/arch/alpha/tlb.hh: src/arch/alpha/tru64/process.cc: src/arch/alpha/tru64/system.cc: src/arch/alpha/tru64/system.hh: src/arch/alpha/utility.hh: src/arch/alpha/vtophys.cc: src/arch/alpha/vtophys.hh: src/arch/mips/faults.cc: src/arch/mips/faults.hh: src/arch/mips/isa_traits.cc: src/arch/mips/isa_traits.hh: src/arch/mips/linux/process.cc: src/arch/mips/process.cc: src/arch/mips/regfile/float_regfile.hh: src/arch/mips/regfile/int_regfile.hh: src/arch/mips/regfile/misc_regfile.hh: src/arch/mips/regfile/regfile.hh: src/arch/mips/stacktrace.hh: src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: src/arch/sparc/isa_traits.hh: src/arch/sparc/linux/process.cc: src/arch/sparc/linux/process.hh: src/arch/sparc/process.cc: src/arch/sparc/regfile.hh: src/arch/sparc/solaris/process.cc: src/arch/sparc/stacktrace.hh: src/arch/sparc/ua2005.cc: src/arch/sparc/utility.hh: src/arch/sparc/vtophys.cc: src/arch/sparc/vtophys.hh: src/base/remote_gdb.cc: src/base/remote_gdb.hh: src/cpu/base.cc: src/cpu/base.hh: src/cpu/base_dyn_inst.hh: src/cpu/checker/cpu.cc: src/cpu/checker/cpu.hh: src/cpu/checker/exec_context.hh: src/cpu/cpu_exec_context.cc: src/cpu/cpu_exec_context.hh: src/cpu/cpuevent.cc: src/cpu/cpuevent.hh: src/cpu/exetrace.hh: src/cpu/intr_control.cc: src/cpu/memtest/memtest.hh: src/cpu/o3/alpha_cpu.hh: src/cpu/o3/alpha_cpu_impl.hh: src/cpu/o3/alpha_dyn_inst_impl.hh: src/cpu/o3/commit.hh: src/cpu/o3/commit_impl.hh: src/cpu/o3/cpu.cc: src/cpu/o3/cpu.hh: src/cpu/o3/fetch_impl.hh: src/cpu/o3/regfile.hh: src/cpu/o3/thread_state.hh: src/cpu/ozone/back_end.hh: src/cpu/ozone/cpu.hh: src/cpu/ozone/cpu_impl.hh: src/cpu/ozone/front_end.hh: src/cpu/ozone/front_end_impl.hh: src/cpu/ozone/inorder_back_end.hh: src/cpu/ozone/lw_back_end.hh: src/cpu/ozone/lw_back_end_impl.hh: src/cpu/ozone/lw_lsq.hh: src/cpu/ozone/lw_lsq_impl.hh: src/cpu/ozone/thread_state.hh: src/cpu/pc_event.cc: src/cpu/pc_event.hh: src/cpu/profile.cc: src/cpu/profile.hh: src/cpu/quiesce_event.cc: src/cpu/quiesce_event.hh: src/cpu/simple/atomic.cc: src/cpu/simple/base.cc: src/cpu/simple/base.hh: src/cpu/simple/timing.cc: src/cpu/static_inst.cc: src/cpu/static_inst.hh: src/cpu/thread_state.hh: src/dev/alpha_console.cc: src/dev/ns_gige.cc: src/dev/sinic.cc: src/dev/tsunami_cchip.cc: src/kern/kernel_stats.cc: src/kern/kernel_stats.hh: src/kern/linux/events.cc: src/kern/linux/events.hh: src/kern/system_events.cc: src/kern/system_events.hh: src/kern/tru64/dump_mbuf.cc: src/kern/tru64/tru64.hh: src/kern/tru64/tru64_events.cc: src/kern/tru64/tru64_events.hh: src/mem/vport.cc: src/mem/vport.hh: src/sim/faults.cc: src/sim/faults.hh: src/sim/process.cc: src/sim/process.hh: src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: src/sim/syscall_emul.cc: src/sim/syscall_emul.hh: src/sim/system.cc: src/cpu/thread_context.hh: src/sim/system.hh: src/sim/vptr.hh: Change ExecContext to ThreadContext. --HG-- rename : src/cpu/exec_context.hh => src/cpu/thread_context.hh extra : convert_revision : 108bb97d15a114a565a2a6a23faa554f4e2fd77e
2006-06-06 23:32:21 +02:00
void copyRegs(ThreadContext *src, ThreadContext *dest);
Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh. Further renames/reorganization will be coming shortly; what is currently CPUExecContext (the old ExecContext from m5) will be renamed to SimpleThread or something similar. src/arch/alpha/arguments.cc: src/arch/alpha/arguments.hh: src/arch/alpha/ev5.cc: src/arch/alpha/faults.cc: src/arch/alpha/faults.hh: src/arch/alpha/freebsd/system.cc: src/arch/alpha/freebsd/system.hh: src/arch/alpha/isa/branch.isa: src/arch/alpha/isa/decoder.isa: src/arch/alpha/isa/main.isa: src/arch/alpha/linux/process.cc: src/arch/alpha/linux/system.cc: src/arch/alpha/linux/system.hh: src/arch/alpha/linux/threadinfo.hh: src/arch/alpha/process.cc: src/arch/alpha/regfile.hh: src/arch/alpha/stacktrace.cc: src/arch/alpha/stacktrace.hh: src/arch/alpha/tlb.cc: src/arch/alpha/tlb.hh: src/arch/alpha/tru64/process.cc: src/arch/alpha/tru64/system.cc: src/arch/alpha/tru64/system.hh: src/arch/alpha/utility.hh: src/arch/alpha/vtophys.cc: src/arch/alpha/vtophys.hh: src/arch/mips/faults.cc: src/arch/mips/faults.hh: src/arch/mips/isa_traits.cc: src/arch/mips/isa_traits.hh: src/arch/mips/linux/process.cc: src/arch/mips/process.cc: src/arch/mips/regfile/float_regfile.hh: src/arch/mips/regfile/int_regfile.hh: src/arch/mips/regfile/misc_regfile.hh: src/arch/mips/regfile/regfile.hh: src/arch/mips/stacktrace.hh: src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: src/arch/sparc/isa_traits.hh: src/arch/sparc/linux/process.cc: src/arch/sparc/linux/process.hh: src/arch/sparc/process.cc: src/arch/sparc/regfile.hh: src/arch/sparc/solaris/process.cc: src/arch/sparc/stacktrace.hh: src/arch/sparc/ua2005.cc: src/arch/sparc/utility.hh: src/arch/sparc/vtophys.cc: src/arch/sparc/vtophys.hh: src/base/remote_gdb.cc: src/base/remote_gdb.hh: src/cpu/base.cc: src/cpu/base.hh: src/cpu/base_dyn_inst.hh: src/cpu/checker/cpu.cc: src/cpu/checker/cpu.hh: src/cpu/checker/exec_context.hh: src/cpu/cpu_exec_context.cc: src/cpu/cpu_exec_context.hh: src/cpu/cpuevent.cc: src/cpu/cpuevent.hh: src/cpu/exetrace.hh: src/cpu/intr_control.cc: src/cpu/memtest/memtest.hh: src/cpu/o3/alpha_cpu.hh: src/cpu/o3/alpha_cpu_impl.hh: src/cpu/o3/alpha_dyn_inst_impl.hh: src/cpu/o3/commit.hh: src/cpu/o3/commit_impl.hh: src/cpu/o3/cpu.cc: src/cpu/o3/cpu.hh: src/cpu/o3/fetch_impl.hh: src/cpu/o3/regfile.hh: src/cpu/o3/thread_state.hh: src/cpu/ozone/back_end.hh: src/cpu/ozone/cpu.hh: src/cpu/ozone/cpu_impl.hh: src/cpu/ozone/front_end.hh: src/cpu/ozone/front_end_impl.hh: src/cpu/ozone/inorder_back_end.hh: src/cpu/ozone/lw_back_end.hh: src/cpu/ozone/lw_back_end_impl.hh: src/cpu/ozone/lw_lsq.hh: src/cpu/ozone/lw_lsq_impl.hh: src/cpu/ozone/thread_state.hh: src/cpu/pc_event.cc: src/cpu/pc_event.hh: src/cpu/profile.cc: src/cpu/profile.hh: src/cpu/quiesce_event.cc: src/cpu/quiesce_event.hh: src/cpu/simple/atomic.cc: src/cpu/simple/base.cc: src/cpu/simple/base.hh: src/cpu/simple/timing.cc: src/cpu/static_inst.cc: src/cpu/static_inst.hh: src/cpu/thread_state.hh: src/dev/alpha_console.cc: src/dev/ns_gige.cc: src/dev/sinic.cc: src/dev/tsunami_cchip.cc: src/kern/kernel_stats.cc: src/kern/kernel_stats.hh: src/kern/linux/events.cc: src/kern/linux/events.hh: src/kern/system_events.cc: src/kern/system_events.hh: src/kern/tru64/dump_mbuf.cc: src/kern/tru64/tru64.hh: src/kern/tru64/tru64_events.cc: src/kern/tru64/tru64_events.hh: src/mem/vport.cc: src/mem/vport.hh: src/sim/faults.cc: src/sim/faults.hh: src/sim/process.cc: src/sim/process.hh: src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: src/sim/syscall_emul.cc: src/sim/syscall_emul.hh: src/sim/system.cc: src/cpu/thread_context.hh: src/sim/system.hh: src/sim/vptr.hh: Change ExecContext to ThreadContext. --HG-- rename : src/cpu/exec_context.hh => src/cpu/thread_context.hh extra : convert_revision : 108bb97d15a114a565a2a6a23faa554f4e2fd77e
2006-06-06 23:32:21 +02:00
void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
} // namespace AlphaISA
#endif