gem5/src/arch
Ali Saidi 5f662d451e clean up fault code a little bit
simplify and make complete some asi checks
implement all the twin asis and remove panic checks on their use
soft int is supported, so we don't need to print writes to it

src/arch/sparc/asi.cc:
    make AsiIsLittle() be all the little asis.
    Speed up AsiIsTwin() a bit
src/arch/sparc/faults.cc:
    clean up the do*Fault code.... Make it work like legion, in particular
    pstate.priv is left alone, not set to 0 like the spec says
src/arch/sparc/isa/decoder.isa:
    implement some more twin ASIs
src/arch/sparc/tlb.cc:
    All the twin asis are implemented, no need to say their not supported anymore
src/arch/sparc/ua2005.cc:
    softint is supported now, no more need to

--HG--
extra : convert_revision : aef2a1b93719235edff830a17a8ec52f23ec9f8b
2007-01-22 21:55:43 -05:00
..
alpha pagetable.hh: 2007-01-08 20:50:45 -05:00
mips Merge zizzer:/bk/sparcfs 2006-12-15 13:27:53 -05:00
sparc clean up fault code a little bit 2007-01-22 21:55:43 -05:00
isa_parser.py Merge zizzer:/bk/newmem 2006-12-12 21:19:51 -05:00
isa_specific.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
SConscript Add support for mmapped iprs to atomic cpu 2006-11-29 17:11:10 -05:00