gem5/tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout

M5 Simulator System

Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved


M5 compiled Apr 14 2009 16:03:50
M5 revision 5716400b2110+ 6033+ default qtip tip new-thread-status-stats-update
M5 started Apr 14 2009 16:03:52
M5 executing on phenom
command line: build/SPARC_SE/m5.opt -d build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/o3-timing -re tests/run.py build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0.  Starting simulation...
Begining test of difficult SPARC instructions...
LDSTUB:		Passed
SWAP:		Passed
CAS FAIL:	Passed
CAS WORK:	Passed
CASX FAIL:	Passed
CASX WORK:	Passed
LDTX:		Passed
LDTW:		Passed
STTW:		Passed
Done
Exiting @ tick 27756500 because target called exit()
tests: update config.ini and stdout for the various tests. These files were a bit too out of date and resulted in a bit of confusion. 2008-07-22 23:00:18 +02:00			`M5 Simulator System`

			`Copyright (c) 2001-2008`
			`The Regents of The University of Michigan`
			`All Rights Reserved`


Update stats after elimination of Unallocated state. Somehow ending threads with halt() instead of deallocate() reduces the squash count on o3 by 1 (and a few other similarly trivial changes). 2009-04-15 22:13:58 +02:00			`M5 compiled Apr 14 2009 16:03:50`
			`M5 revision 5716400b2110+ 6033+ default qtip tip new-thread-status-stats-update`
			`M5 started Apr 14 2009 16:03:52`
			`M5 executing on phenom`
			`command line: build/SPARC_SE/m5.opt -d build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/o3-timing -re tests/run.py build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/o3-timing`
tests: update config.ini and stdout for the various tests. These files were a bit too out of date and resulted in a bit of confusion. 2008-07-22 23:00:18 +02:00			`Global frequency set at 1000000000000 ticks per second`
Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache. 2008-11-06 17:11:42 +01:00			`info: Entering event queue @ 0. Starting simulation...`
Added SPARC o3 insttest regression. --HG-- extra : convert_revision : b008b4bda60ced329df9b700ff9b0a978e2d3b19 2007-04-09 09:59:56 +02:00			`Begining test of difficult SPARC instructions...`
			`LDSTUB: Passed`
			`SWAP: Passed`
			`CAS FAIL: Passed`
			`CAS WORK: Passed`
			`CASX FAIL: Passed`
			`CASX WORK: Passed`
			`LDTX: Passed`
			`LDTW: Passed`
			`STTW: Passed`
			`Done`
Make default PhysicalMemory latency slightly more realistic. Also update stats to reflect change. 2008-08-04 00:13:29 +02:00			`Exiting @ tick 27756500 because target called exit()`