2006-03-26 00:31:20 +01:00
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/*
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2013-02-19 11:56:06 +01:00
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* Copyright (c) 2011-2013 ARM Limited
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2012-01-17 19:55:09 +01:00
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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2006-03-26 00:31:20 +01:00
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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2006-06-01 01:26:56 +02:00
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*
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* Authors: Ali Saidi
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2012-01-17 19:55:09 +01:00
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* Andreas Hansson
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MEM: Introduce the master/slave port sub-classes in C++
This patch introduces the notion of a master and slave port in the C++
code, thus bringing the previous classification from the Python
classes into the corresponding simulation objects and memory objects.
The patch enables us to classify behaviours into the two bins and add
assumptions and enfore compliance, also simplifying the two
interfaces. As a starting point, isSnooping is confined to a master
port, and getAddrRanges to slave ports. More of these specilisations
are to come in later patches.
The getPort function is not getMasterPort and getSlavePort, and
returns a port reference rather than a pointer as NULL would never be
a valid return value. The default implementation of these two
functions is placed in MemObject, and calls fatal.
The one drawback with this specific patch is that it requires some
code duplication, e.g. QueuedPort becomes QueuedMasterPort and
QueuedSlavePort, and BusPort becomes BusMasterPort and BusSlavePort
(avoiding multiple inheritance). With the later introduction of the
port interfaces, moving the functionality outside the port itself, a
lot of the duplicated code will disappear again.
2012-03-30 15:40:11 +02:00
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* William Wang
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2006-03-26 00:31:20 +01:00
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*/
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/**
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2006-08-15 01:25:07 +02:00
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* @file
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* Definition of a bus object.
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2006-03-26 00:31:20 +01:00
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*/
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2006-07-06 20:41:01 +02:00
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#include "base/misc.hh"
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2006-04-12 01:35:30 +02:00
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#include "base/trace.hh"
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2011-04-15 19:44:32 +02:00
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#include "debug/Bus.hh"
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#include "debug/BusAddrRanges.hh"
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2012-08-15 16:38:08 +02:00
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#include "debug/Drain.hh"
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2006-04-12 01:35:30 +02:00
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#include "mem/bus.hh"
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2006-03-26 00:31:20 +01:00
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Bus: Split the bus into a non-coherent and coherent bus
This patch introduces a class hierarchy of buses, a non-coherent one,
and a coherent one, splitting the existing bus functionality. By doing
so it also enables further specialisation of the two types of buses.
A non-coherent bus connects a number of non-snooping masters and
slaves, and routes the request and response packets based on the
address. The request packets issued by the master connected to a
non-coherent bus could still snoop in caches attached to a coherent
bus, as is the case with the I/O bus and memory bus in most system
configurations. No snoops will, however, reach any master on the
non-coherent bus itself. The non-coherent bus can be used as a
template for modelling PCI, PCIe, and non-coherent AMBA and OCP buses,
and is typically used for the I/O buses.
A coherent bus connects a number of (potentially) snooping masters and
slaves, and routes the request and response packets based on the
address, and also forwards all requests to the snoopers and deals with
the snoop responses. The coherent bus can be used as a template for
modelling QPI, HyperTransport, ACE and coherent OCP buses, and is
typically used for the L1-to-L2 buses and as the main system
interconnect.
The configuration scripts are updated to use a NoncoherentBus for all
peripheral and I/O buses.
A bit of minor tidying up has also been done.
--HG--
rename : src/mem/bus.cc => src/mem/coherent_bus.cc
rename : src/mem/bus.hh => src/mem/coherent_bus.hh
rename : src/mem/bus.cc => src/mem/noncoherent_bus.cc
rename : src/mem/bus.hh => src/mem/noncoherent_bus.hh
2012-05-31 19:30:04 +02:00
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BaseBus::BaseBus(const BaseBusParams *p)
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2012-08-21 11:49:01 +02:00
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: MemObject(p),
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Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
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headerCycles(p->header_cycles), width(p->width),
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2012-10-15 14:07:04 +02:00
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gotAddrRanges(p->port_default_connection_count +
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p->port_master_connection_count, false),
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gotAllAddrRanges(false), defaultPortID(InvalidPortID),
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2013-07-18 14:31:16 +02:00
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useDefaultRange(p->use_default_range)
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2012-09-21 16:11:24 +02:00
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{}
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2012-02-24 17:43:53 +01:00
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Bus: Split the bus into a non-coherent and coherent bus
This patch introduces a class hierarchy of buses, a non-coherent one,
and a coherent one, splitting the existing bus functionality. By doing
so it also enables further specialisation of the two types of buses.
A non-coherent bus connects a number of non-snooping masters and
slaves, and routes the request and response packets based on the
address. The request packets issued by the master connected to a
non-coherent bus could still snoop in caches attached to a coherent
bus, as is the case with the I/O bus and memory bus in most system
configurations. No snoops will, however, reach any master on the
non-coherent bus itself. The non-coherent bus can be used as a
template for modelling PCI, PCIe, and non-coherent AMBA and OCP buses,
and is typically used for the I/O buses.
A coherent bus connects a number of (potentially) snooping masters and
slaves, and routes the request and response packets based on the
address, and also forwards all requests to the snoopers and deals with
the snoop responses. The coherent bus can be used as a template for
modelling QPI, HyperTransport, ACE and coherent OCP buses, and is
typically used for the L1-to-L2 buses and as the main system
interconnect.
The configuration scripts are updated to use a NoncoherentBus for all
peripheral and I/O buses.
A bit of minor tidying up has also been done.
--HG--
rename : src/mem/bus.cc => src/mem/coherent_bus.cc
rename : src/mem/bus.hh => src/mem/coherent_bus.hh
rename : src/mem/bus.cc => src/mem/noncoherent_bus.cc
rename : src/mem/bus.hh => src/mem/noncoherent_bus.hh
2012-05-31 19:30:04 +02:00
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BaseBus::~BaseBus()
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{
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for (MasterPortIter m = masterPorts.begin(); m != masterPorts.end();
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++m) {
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delete *m;
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2012-03-22 11:37:21 +01:00
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}
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Bus: Split the bus into a non-coherent and coherent bus
This patch introduces a class hierarchy of buses, a non-coherent one,
and a coherent one, splitting the existing bus functionality. By doing
so it also enables further specialisation of the two types of buses.
A non-coherent bus connects a number of non-snooping masters and
slaves, and routes the request and response packets based on the
address. The request packets issued by the master connected to a
non-coherent bus could still snoop in caches attached to a coherent
bus, as is the case with the I/O bus and memory bus in most system
configurations. No snoops will, however, reach any master on the
non-coherent bus itself. The non-coherent bus can be used as a
template for modelling PCI, PCIe, and non-coherent AMBA and OCP buses,
and is typically used for the I/O buses.
A coherent bus connects a number of (potentially) snooping masters and
slaves, and routes the request and response packets based on the
address, and also forwards all requests to the snoopers and deals with
the snoop responses. The coherent bus can be used as a template for
modelling QPI, HyperTransport, ACE and coherent OCP buses, and is
typically used for the L1-to-L2 buses and as the main system
interconnect.
The configuration scripts are updated to use a NoncoherentBus for all
peripheral and I/O buses.
A bit of minor tidying up has also been done.
--HG--
rename : src/mem/bus.cc => src/mem/coherent_bus.cc
rename : src/mem/bus.hh => src/mem/coherent_bus.hh
rename : src/mem/bus.cc => src/mem/noncoherent_bus.cc
rename : src/mem/bus.hh => src/mem/noncoherent_bus.hh
2012-05-31 19:30:04 +02:00
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for (SlavePortIter s = slavePorts.begin(); s != slavePorts.end();
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++s) {
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delete *s;
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2012-02-24 17:43:53 +01:00
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}
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2010-08-17 14:06:21 +02:00
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}
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2012-10-11 12:38:43 +02:00
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void
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BaseBus::init()
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{
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}
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2012-10-15 14:12:35 +02:00
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BaseMasterPort &
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BaseBus::getMasterPort(const std::string &if_name, PortID idx)
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2006-05-26 19:48:35 +02:00
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{
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MEM: Separate snoops and normal memory requests/responses
This patch introduces port access methods that separates snoop
request/responses from normal memory request/responses. The
differentiation is made for functional, atomic and timing accesses and
builds on the introduction of master and slave ports.
Before the introduction of this patch, the packets belonging to the
different phases of the protocol (request -> [forwarded snoop request
-> snoop response]* -> response) all use the same port access
functions, even though the snoop packets flow in the opposite
direction to the normal packet. That is, a coherent master sends
normal request and receives responses, but receives snoop requests and
sends snoop responses (vice versa for the slave). These two distinct
phases now use different access functions, as described below.
Starting with the functional access, a master sends a request to a
slave through sendFunctional, and the request packet is turned into a
response before the call returns. In a system without cache coherence,
this is all that is needed from the functional interface. For the
cache-coherent scenario, a slave also sends snoop requests to coherent
masters through sendFunctionalSnoop, with responses returned within
the same packet pointer. This is currently used by the bus and caches,
and the LSQ of the O3 CPU. The send/recvFunctional and
send/recvFunctionalSnoop are moved from the Port super class to the
appropriate subclass.
Atomic accesses follow the same flow as functional accesses, with
request being sent from master to slave through sendAtomic. In the
case of cache-coherent ports, a slave can send snoop requests to a
master through sendAtomicSnoop. Just as for the functional access
methods, the atomic send and receive member functions are moved to the
appropriate subclasses.
The timing access methods are different from the functional and atomic
in that requests and responses are separated in time and
send/recvTiming are used for both directions. Hence, a master uses
sendTiming to send a request to a slave, and a slave uses sendTiming
to send a response back to a master, at a later point in time. Snoop
requests and responses travel in the opposite direction, similar to
what happens in functional and atomic accesses. With the introduction
of this patch, it is possible to determine the direction of packets in
the bus, and no longer necessary to look for both a master and a slave
port with the requested port id.
In contrast to the normal recvFunctional, recvAtomic and recvTiming
that are pure virtual functions, the recvFunctionalSnoop,
recvAtomicSnoop and recvTimingSnoop have a default implementation that
calls panic. This is to allow non-coherent master and slave ports to
not implement these functions.
2012-04-14 11:45:07 +02:00
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if (if_name == "master" && idx < masterPorts.size()) {
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// the master port index translates directly to the vector position
|
MEM: Introduce the master/slave port sub-classes in C++
This patch introduces the notion of a master and slave port in the C++
code, thus bringing the previous classification from the Python
classes into the corresponding simulation objects and memory objects.
The patch enables us to classify behaviours into the two bins and add
assumptions and enfore compliance, also simplifying the two
interfaces. As a starting point, isSnooping is confined to a master
port, and getAddrRanges to slave ports. More of these specilisations
are to come in later patches.
The getPort function is not getMasterPort and getSlavePort, and
returns a port reference rather than a pointer as NULL would never be
a valid return value. The default implementation of these two
functions is placed in MemObject, and calls fatal.
The one drawback with this specific patch is that it requires some
code duplication, e.g. QueuedPort becomes QueuedMasterPort and
QueuedSlavePort, and BusPort becomes BusMasterPort and BusSlavePort
(avoiding multiple inheritance). With the later introduction of the
port interfaces, moving the functionality outside the port itself, a
lot of the duplicated code will disappear again.
2012-03-30 15:40:11 +02:00
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return *masterPorts[idx];
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2012-02-24 17:43:53 +01:00
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} else if (if_name == "default") {
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2012-05-30 11:29:42 +02:00
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return *masterPorts[defaultPortID];
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2012-01-17 19:55:09 +01:00
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} else {
|
MEM: Introduce the master/slave port sub-classes in C++
This patch introduces the notion of a master and slave port in the C++
code, thus bringing the previous classification from the Python
classes into the corresponding simulation objects and memory objects.
The patch enables us to classify behaviours into the two bins and add
assumptions and enfore compliance, also simplifying the two
interfaces. As a starting point, isSnooping is confined to a master
port, and getAddrRanges to slave ports. More of these specilisations
are to come in later patches.
The getPort function is not getMasterPort and getSlavePort, and
returns a port reference rather than a pointer as NULL would never be
a valid return value. The default implementation of these two
functions is placed in MemObject, and calls fatal.
The one drawback with this specific patch is that it requires some
code duplication, e.g. QueuedPort becomes QueuedMasterPort and
QueuedSlavePort, and BusPort becomes BusMasterPort and BusSlavePort
(avoiding multiple inheritance). With the later introduction of the
port interfaces, moving the functionality outside the port itself, a
lot of the duplicated code will disappear again.
2012-03-30 15:40:11 +02:00
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return MemObject::getMasterPort(if_name, idx);
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}
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}
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2012-10-15 14:12:35 +02:00
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BaseSlavePort &
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BaseBus::getSlavePort(const std::string &if_name, PortID idx)
|
MEM: Introduce the master/slave port sub-classes in C++
This patch introduces the notion of a master and slave port in the C++
code, thus bringing the previous classification from the Python
classes into the corresponding simulation objects and memory objects.
The patch enables us to classify behaviours into the two bins and add
assumptions and enfore compliance, also simplifying the two
interfaces. As a starting point, isSnooping is confined to a master
port, and getAddrRanges to slave ports. More of these specilisations
are to come in later patches.
The getPort function is not getMasterPort and getSlavePort, and
returns a port reference rather than a pointer as NULL would never be
a valid return value. The default implementation of these two
functions is placed in MemObject, and calls fatal.
The one drawback with this specific patch is that it requires some
code duplication, e.g. QueuedPort becomes QueuedMasterPort and
QueuedSlavePort, and BusPort becomes BusMasterPort and BusSlavePort
(avoiding multiple inheritance). With the later introduction of the
port interfaces, moving the functionality outside the port itself, a
lot of the duplicated code will disappear again.
2012-03-30 15:40:11 +02:00
|
|
|
{
|
MEM: Separate snoops and normal memory requests/responses
This patch introduces port access methods that separates snoop
request/responses from normal memory request/responses. The
differentiation is made for functional, atomic and timing accesses and
builds on the introduction of master and slave ports.
Before the introduction of this patch, the packets belonging to the
different phases of the protocol (request -> [forwarded snoop request
-> snoop response]* -> response) all use the same port access
functions, even though the snoop packets flow in the opposite
direction to the normal packet. That is, a coherent master sends
normal request and receives responses, but receives snoop requests and
sends snoop responses (vice versa for the slave). These two distinct
phases now use different access functions, as described below.
Starting with the functional access, a master sends a request to a
slave through sendFunctional, and the request packet is turned into a
response before the call returns. In a system without cache coherence,
this is all that is needed from the functional interface. For the
cache-coherent scenario, a slave also sends snoop requests to coherent
masters through sendFunctionalSnoop, with responses returned within
the same packet pointer. This is currently used by the bus and caches,
and the LSQ of the O3 CPU. The send/recvFunctional and
send/recvFunctionalSnoop are moved from the Port super class to the
appropriate subclass.
Atomic accesses follow the same flow as functional accesses, with
request being sent from master to slave through sendAtomic. In the
case of cache-coherent ports, a slave can send snoop requests to a
master through sendAtomicSnoop. Just as for the functional access
methods, the atomic send and receive member functions are moved to the
appropriate subclasses.
The timing access methods are different from the functional and atomic
in that requests and responses are separated in time and
send/recvTiming are used for both directions. Hence, a master uses
sendTiming to send a request to a slave, and a slave uses sendTiming
to send a response back to a master, at a later point in time. Snoop
requests and responses travel in the opposite direction, similar to
what happens in functional and atomic accesses. With the introduction
of this patch, it is possible to determine the direction of packets in
the bus, and no longer necessary to look for both a master and a slave
port with the requested port id.
In contrast to the normal recvFunctional, recvAtomic and recvTiming
that are pure virtual functions, the recvFunctionalSnoop,
recvAtomicSnoop and recvTimingSnoop have a default implementation that
calls panic. This is to allow non-coherent master and slave ports to
not implement these functions.
2012-04-14 11:45:07 +02:00
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if (if_name == "slave" && idx < slavePorts.size()) {
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// the slave port index translates directly to the vector position
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return *slavePorts[idx];
|
MEM: Introduce the master/slave port sub-classes in C++
This patch introduces the notion of a master and slave port in the C++
code, thus bringing the previous classification from the Python
classes into the corresponding simulation objects and memory objects.
The patch enables us to classify behaviours into the two bins and add
assumptions and enfore compliance, also simplifying the two
interfaces. As a starting point, isSnooping is confined to a master
port, and getAddrRanges to slave ports. More of these specilisations
are to come in later patches.
The getPort function is not getMasterPort and getSlavePort, and
returns a port reference rather than a pointer as NULL would never be
a valid return value. The default implementation of these two
functions is placed in MemObject, and calls fatal.
The one drawback with this specific patch is that it requires some
code duplication, e.g. QueuedPort becomes QueuedMasterPort and
QueuedSlavePort, and BusPort becomes BusMasterPort and BusSlavePort
(avoiding multiple inheritance). With the later introduction of the
port interfaces, moving the functionality outside the port itself, a
lot of the duplicated code will disappear again.
2012-03-30 15:40:11 +02:00
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} else {
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return MemObject::getSlavePort(if_name, idx);
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2006-11-02 21:20:37 +01:00
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}
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2006-05-26 19:48:35 +02:00
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}
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2013-02-19 11:56:06 +01:00
|
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|
void
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Bus: Split the bus into a non-coherent and coherent bus
This patch introduces a class hierarchy of buses, a non-coherent one,
and a coherent one, splitting the existing bus functionality. By doing
so it also enables further specialisation of the two types of buses.
A non-coherent bus connects a number of non-snooping masters and
slaves, and routes the request and response packets based on the
address. The request packets issued by the master connected to a
non-coherent bus could still snoop in caches attached to a coherent
bus, as is the case with the I/O bus and memory bus in most system
configurations. No snoops will, however, reach any master on the
non-coherent bus itself. The non-coherent bus can be used as a
template for modelling PCI, PCIe, and non-coherent AMBA and OCP buses,
and is typically used for the I/O buses.
A coherent bus connects a number of (potentially) snooping masters and
slaves, and routes the request and response packets based on the
address, and also forwards all requests to the snoopers and deals with
the snoop responses. The coherent bus can be used as a template for
modelling QPI, HyperTransport, ACE and coherent OCP buses, and is
typically used for the L1-to-L2 buses and as the main system
interconnect.
The configuration scripts are updated to use a NoncoherentBus for all
peripheral and I/O buses.
A bit of minor tidying up has also been done.
--HG--
rename : src/mem/bus.cc => src/mem/coherent_bus.cc
rename : src/mem/bus.hh => src/mem/coherent_bus.hh
rename : src/mem/bus.cc => src/mem/noncoherent_bus.cc
rename : src/mem/bus.hh => src/mem/noncoherent_bus.hh
2012-05-31 19:30:04 +02:00
|
|
|
BaseBus::calcPacketTiming(PacketPtr pkt)
|
2006-03-26 00:31:20 +01:00
|
|
|
{
|
2013-02-19 11:56:06 +01:00
|
|
|
// the bus will be called at a time that is not necessarily
|
|
|
|
// coinciding with its own clock, so start by determining how long
|
|
|
|
// until the next clock edge (could be zero)
|
2013-04-22 19:20:31 +02:00
|
|
|
Tick offset = clockEdge() - curTick();
|
2006-10-10 00:12:45 +02:00
|
|
|
|
2013-02-19 11:56:06 +01:00
|
|
|
// determine how many cycles are needed to send the data
|
|
|
|
unsigned dataCycles = pkt->hasData() ? divCeil(pkt->getSize(), width) : 0;
|
2008-02-26 08:20:08 +01:00
|
|
|
|
2013-02-19 11:56:06 +01:00
|
|
|
// before setting the bus delay fields of the packet, ensure that
|
|
|
|
// the delay from any previous bus has been accounted for
|
|
|
|
if (pkt->busFirstWordDelay != 0 || pkt->busLastWordDelay != 0)
|
|
|
|
panic("Packet %s already has bus delay (%d, %d) that should be "
|
|
|
|
"accounted for.\n", pkt->cmdString(), pkt->busFirstWordDelay,
|
|
|
|
pkt->busLastWordDelay);
|
|
|
|
|
2013-02-19 11:56:06 +01:00
|
|
|
// The first word will be delivered on the cycle after the header.
|
|
|
|
pkt->busFirstWordDelay = (headerCycles + 1) * clockPeriod() + offset;
|
2008-03-17 08:07:38 +01:00
|
|
|
|
2013-02-19 11:56:06 +01:00
|
|
|
// Note that currently busLastWordDelay can be smaller than
|
|
|
|
// busFirstWordDelay if the packet has no data
|
|
|
|
pkt->busLastWordDelay = (headerCycles + dataCycles) * clockPeriod() +
|
|
|
|
offset;
|
2008-02-26 08:20:08 +01:00
|
|
|
}
|
|
|
|
|
2013-05-30 18:54:01 +02:00
|
|
|
template <typename SrcType, typename DstType>
|
|
|
|
BaseBus::Layer<SrcType,DstType>::Layer(DstType& _port, BaseBus& _bus,
|
|
|
|
const std::string& _name) :
|
|
|
|
port(_port), bus(_bus), _name(_name), state(IDLE), drainManager(NULL),
|
2014-09-03 13:42:53 +02:00
|
|
|
waitingForPeer(NULL), releaseEvent(this)
|
2012-07-09 18:35:36 +02:00
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2013-05-30 18:54:01 +02:00
|
|
|
template <typename SrcType, typename DstType>
|
|
|
|
void BaseBus::Layer<SrcType,DstType>::occupyLayer(Tick until)
|
2008-02-26 08:20:08 +01:00
|
|
|
{
|
2013-03-26 19:46:47 +01:00
|
|
|
// ensure the state is busy at this point, as the bus should
|
|
|
|
// transition from idle as soon as it has decided to forward the
|
|
|
|
// packet to prevent any follow-on calls to sendTiming seeing an
|
|
|
|
// unoccupied bus
|
|
|
|
assert(state == BUSY);
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
|
|
|
|
// until should never be 0 as express snoops never occupy the bus
|
|
|
|
assert(until != 0);
|
2012-07-09 18:35:36 +02:00
|
|
|
bus.schedule(releaseEvent, until);
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
|
2013-05-30 18:53:58 +02:00
|
|
|
// account for the occupied ticks
|
|
|
|
occupancy += until - curTick();
|
|
|
|
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
DPRINTF(BaseBus, "The bus is now busy from tick %d to %d\n",
|
|
|
|
curTick(), until);
|
2006-10-11 05:28:33 +02:00
|
|
|
}
|
|
|
|
|
2013-05-30 18:54:01 +02:00
|
|
|
template <typename SrcType, typename DstType>
|
2006-10-11 05:28:33 +02:00
|
|
|
bool
|
2013-05-30 18:54:01 +02:00
|
|
|
BaseBus::Layer<SrcType,DstType>::tryTiming(SrcType* src_port)
|
2006-10-11 05:28:33 +02:00
|
|
|
{
|
2013-05-30 18:54:02 +02:00
|
|
|
// if we are in the retry state, we will not see anything but the
|
|
|
|
// retrying port (or in the case of the snoop ports the snoop
|
|
|
|
// response port that mirrors the actual slave port) as we leave
|
|
|
|
// this state again in zero time if the peer does not immediately
|
|
|
|
// call the bus when receiving the retry
|
|
|
|
|
|
|
|
// first we see if the layer is busy, next we check if the
|
|
|
|
// destination port is already engaged in a transaction waiting
|
|
|
|
// for a retry from the peer
|
|
|
|
if (state == BUSY || waitingForPeer != NULL) {
|
|
|
|
// the port should not be waiting already
|
|
|
|
assert(std::find(waitingForLayer.begin(), waitingForLayer.end(),
|
|
|
|
src_port) == waitingForLayer.end());
|
|
|
|
|
2013-03-26 19:46:47 +01:00
|
|
|
// put the port at the end of the retry list waiting for the
|
|
|
|
// layer to be freed up (and in the case of a busy peer, for
|
|
|
|
// that transaction to go through, and then the bus to free
|
|
|
|
// up)
|
2013-05-30 18:54:01 +02:00
|
|
|
waitingForLayer.push_back(src_port);
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
return false;
|
MEM: Separate snoops and normal memory requests/responses
This patch introduces port access methods that separates snoop
request/responses from normal memory request/responses. The
differentiation is made for functional, atomic and timing accesses and
builds on the introduction of master and slave ports.
Before the introduction of this patch, the packets belonging to the
different phases of the protocol (request -> [forwarded snoop request
-> snoop response]* -> response) all use the same port access
functions, even though the snoop packets flow in the opposite
direction to the normal packet. That is, a coherent master sends
normal request and receives responses, but receives snoop requests and
sends snoop responses (vice versa for the slave). These two distinct
phases now use different access functions, as described below.
Starting with the functional access, a master sends a request to a
slave through sendFunctional, and the request packet is turned into a
response before the call returns. In a system without cache coherence,
this is all that is needed from the functional interface. For the
cache-coherent scenario, a slave also sends snoop requests to coherent
masters through sendFunctionalSnoop, with responses returned within
the same packet pointer. This is currently used by the bus and caches,
and the LSQ of the O3 CPU. The send/recvFunctional and
send/recvFunctionalSnoop are moved from the Port super class to the
appropriate subclass.
Atomic accesses follow the same flow as functional accesses, with
request being sent from master to slave through sendAtomic. In the
case of cache-coherent ports, a slave can send snoop requests to a
master through sendAtomicSnoop. Just as for the functional access
methods, the atomic send and receive member functions are moved to the
appropriate subclasses.
The timing access methods are different from the functional and atomic
in that requests and responses are separated in time and
send/recvTiming are used for both directions. Hence, a master uses
sendTiming to send a request to a slave, and a slave uses sendTiming
to send a response back to a master, at a later point in time. Snoop
requests and responses travel in the opposite direction, similar to
what happens in functional and atomic accesses. With the introduction
of this patch, it is possible to determine the direction of packets in
the bus, and no longer necessary to look for both a master and a slave
port with the requested port id.
In contrast to the normal recvFunctional, recvAtomic and recvTiming
that are pure virtual functions, the recvFunctionalSnoop,
recvAtomicSnoop and recvTimingSnoop have a default implementation that
calls panic. This is to allow non-coherent master and slave ports to
not implement these functions.
2012-04-14 11:45:07 +02:00
|
|
|
}
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
|
2013-03-26 19:46:47 +01:00
|
|
|
// update the state to busy
|
|
|
|
state = BUSY;
|
2013-03-26 19:46:46 +01:00
|
|
|
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
return true;
|
MEM: Separate snoops and normal memory requests/responses
This patch introduces port access methods that separates snoop
request/responses from normal memory request/responses. The
differentiation is made for functional, atomic and timing accesses and
builds on the introduction of master and slave ports.
Before the introduction of this patch, the packets belonging to the
different phases of the protocol (request -> [forwarded snoop request
-> snoop response]* -> response) all use the same port access
functions, even though the snoop packets flow in the opposite
direction to the normal packet. That is, a coherent master sends
normal request and receives responses, but receives snoop requests and
sends snoop responses (vice versa for the slave). These two distinct
phases now use different access functions, as described below.
Starting with the functional access, a master sends a request to a
slave through sendFunctional, and the request packet is turned into a
response before the call returns. In a system without cache coherence,
this is all that is needed from the functional interface. For the
cache-coherent scenario, a slave also sends snoop requests to coherent
masters through sendFunctionalSnoop, with responses returned within
the same packet pointer. This is currently used by the bus and caches,
and the LSQ of the O3 CPU. The send/recvFunctional and
send/recvFunctionalSnoop are moved from the Port super class to the
appropriate subclass.
Atomic accesses follow the same flow as functional accesses, with
request being sent from master to slave through sendAtomic. In the
case of cache-coherent ports, a slave can send snoop requests to a
master through sendAtomicSnoop. Just as for the functional access
methods, the atomic send and receive member functions are moved to the
appropriate subclasses.
The timing access methods are different from the functional and atomic
in that requests and responses are separated in time and
send/recvTiming are used for both directions. Hence, a master uses
sendTiming to send a request to a slave, and a slave uses sendTiming
to send a response back to a master, at a later point in time. Snoop
requests and responses travel in the opposite direction, similar to
what happens in functional and atomic accesses. With the introduction
of this patch, it is possible to determine the direction of packets in
the bus, and no longer necessary to look for both a master and a slave
port with the requested port id.
In contrast to the normal recvFunctional, recvAtomic and recvTiming
that are pure virtual functions, the recvFunctionalSnoop,
recvAtomicSnoop and recvTimingSnoop have a default implementation that
calls panic. This is to allow non-coherent master and slave ports to
not implement these functions.
2012-04-14 11:45:07 +02:00
|
|
|
}
|
2006-10-11 05:28:33 +02:00
|
|
|
|
2013-05-30 18:54:01 +02:00
|
|
|
template <typename SrcType, typename DstType>
|
MEM: Separate requests and responses for timing accesses
This patch moves send/recvTiming and send/recvTimingSnoop from the
Port base class to the MasterPort and SlavePort, and also splits them
into separate member functions for requests and responses:
send/recvTimingReq, send/recvTimingResp, and send/recvTimingSnoopReq,
send/recvTimingSnoopResp. A master port sends requests and receives
responses, and also receives snoop requests and sends snoop
responses. A slave port has the reciprocal behaviour as it receives
requests and sends responses, and sends snoop requests and receives
snoop responses.
For all MemObjects that have only master ports or slave ports (but not
both), e.g. a CPU, or a PIO device, this patch merely adds more
clarity to what kind of access is taking place. For example, a CPU
port used to call sendTiming, and will now call
sendTimingReq. Similarly, a response previously came back through
recvTiming, which is now recvTimingResp. For the modules that have
both master and slave ports, e.g. the bus, the behaviour was
previously relying on branches based on pkt->isRequest(), and this is
now replaced with a direct call to the apprioriate member function
depending on the type of access. Please note that send/recvRetry is
still shared by all the timing accessors and remains in the Port base
class for now (to maintain the current bus functionality and avoid
changing the statistics of all regressions).
The packet queue is split into a MasterPort and SlavePort version to
facilitate the use of the new timing accessors. All uses of the
PacketQueue are updated accordingly.
With this patch, the type of packet (request or response) is now well
defined for each type of access, and asserts on pkt->isRequest() and
pkt->isResponse() are now moved to the appropriate send member
functions. It is also worth noting that sendTimingSnoopReq no longer
returns a boolean, as the semantics do not alow snoop requests to be
rejected or stalled. All these assumptions are now excplicitly part of
the port interface itself.
2012-05-01 19:40:42 +02:00
|
|
|
void
|
2013-05-30 18:54:01 +02:00
|
|
|
BaseBus::Layer<SrcType,DstType>::succeededTiming(Tick busy_time)
|
MEM: Separate snoops and normal memory requests/responses
This patch introduces port access methods that separates snoop
request/responses from normal memory request/responses. The
differentiation is made for functional, atomic and timing accesses and
builds on the introduction of master and slave ports.
Before the introduction of this patch, the packets belonging to the
different phases of the protocol (request -> [forwarded snoop request
-> snoop response]* -> response) all use the same port access
functions, even though the snoop packets flow in the opposite
direction to the normal packet. That is, a coherent master sends
normal request and receives responses, but receives snoop requests and
sends snoop responses (vice versa for the slave). These two distinct
phases now use different access functions, as described below.
Starting with the functional access, a master sends a request to a
slave through sendFunctional, and the request packet is turned into a
response before the call returns. In a system without cache coherence,
this is all that is needed from the functional interface. For the
cache-coherent scenario, a slave also sends snoop requests to coherent
masters through sendFunctionalSnoop, with responses returned within
the same packet pointer. This is currently used by the bus and caches,
and the LSQ of the O3 CPU. The send/recvFunctional and
send/recvFunctionalSnoop are moved from the Port super class to the
appropriate subclass.
Atomic accesses follow the same flow as functional accesses, with
request being sent from master to slave through sendAtomic. In the
case of cache-coherent ports, a slave can send snoop requests to a
master through sendAtomicSnoop. Just as for the functional access
methods, the atomic send and receive member functions are moved to the
appropriate subclasses.
The timing access methods are different from the functional and atomic
in that requests and responses are separated in time and
send/recvTiming are used for both directions. Hence, a master uses
sendTiming to send a request to a slave, and a slave uses sendTiming
to send a response back to a master, at a later point in time. Snoop
requests and responses travel in the opposite direction, similar to
what happens in functional and atomic accesses. With the introduction
of this patch, it is possible to determine the direction of packets in
the bus, and no longer necessary to look for both a master and a slave
port with the requested port id.
In contrast to the normal recvFunctional, recvAtomic and recvTiming
that are pure virtual functions, the recvFunctionalSnoop,
recvAtomicSnoop and recvTimingSnoop have a default implementation that
calls panic. This is to allow non-coherent master and slave ports to
not implement these functions.
2012-04-14 11:45:07 +02:00
|
|
|
{
|
2013-03-26 19:46:47 +01:00
|
|
|
// we should have gone from idle or retry to busy in the tryTiming
|
|
|
|
// test
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
assert(state == BUSY);
|
|
|
|
|
|
|
|
// occupy the bus accordingly
|
2012-07-09 18:35:36 +02:00
|
|
|
occupyLayer(busy_time);
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
}
|
|
|
|
|
2013-05-30 18:54:01 +02:00
|
|
|
template <typename SrcType, typename DstType>
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
void
|
2013-05-30 18:54:01 +02:00
|
|
|
BaseBus::Layer<SrcType,DstType>::failedTiming(SrcType* src_port,
|
|
|
|
Tick busy_time)
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
{
|
2013-03-26 19:46:47 +01:00
|
|
|
// ensure no one got in between and tried to send something to
|
|
|
|
// this port
|
2013-05-30 18:54:01 +02:00
|
|
|
assert(waitingForPeer == NULL);
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
|
2013-03-26 19:46:47 +01:00
|
|
|
// if the source port is the current retrying one or not, we have
|
|
|
|
// failed in forwarding and should track that we are now waiting
|
|
|
|
// for the peer to send a retry
|
2013-05-30 18:54:01 +02:00
|
|
|
waitingForPeer = src_port;
|
2013-03-26 19:46:47 +01:00
|
|
|
|
|
|
|
// we should have gone from idle or retry to busy in the tryTiming
|
|
|
|
// test
|
|
|
|
assert(state == BUSY);
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
|
|
|
|
// occupy the bus accordingly
|
2012-07-09 18:35:36 +02:00
|
|
|
occupyLayer(busy_time);
|
MEM: Separate snoops and normal memory requests/responses
This patch introduces port access methods that separates snoop
request/responses from normal memory request/responses. The
differentiation is made for functional, atomic and timing accesses and
builds on the introduction of master and slave ports.
Before the introduction of this patch, the packets belonging to the
different phases of the protocol (request -> [forwarded snoop request
-> snoop response]* -> response) all use the same port access
functions, even though the snoop packets flow in the opposite
direction to the normal packet. That is, a coherent master sends
normal request and receives responses, but receives snoop requests and
sends snoop responses (vice versa for the slave). These two distinct
phases now use different access functions, as described below.
Starting with the functional access, a master sends a request to a
slave through sendFunctional, and the request packet is turned into a
response before the call returns. In a system without cache coherence,
this is all that is needed from the functional interface. For the
cache-coherent scenario, a slave also sends snoop requests to coherent
masters through sendFunctionalSnoop, with responses returned within
the same packet pointer. This is currently used by the bus and caches,
and the LSQ of the O3 CPU. The send/recvFunctional and
send/recvFunctionalSnoop are moved from the Port super class to the
appropriate subclass.
Atomic accesses follow the same flow as functional accesses, with
request being sent from master to slave through sendAtomic. In the
case of cache-coherent ports, a slave can send snoop requests to a
master through sendAtomicSnoop. Just as for the functional access
methods, the atomic send and receive member functions are moved to the
appropriate subclasses.
The timing access methods are different from the functional and atomic
in that requests and responses are separated in time and
send/recvTiming are used for both directions. Hence, a master uses
sendTiming to send a request to a slave, and a slave uses sendTiming
to send a response back to a master, at a later point in time. Snoop
requests and responses travel in the opposite direction, similar to
what happens in functional and atomic accesses. With the introduction
of this patch, it is possible to determine the direction of packets in
the bus, and no longer necessary to look for both a master and a slave
port with the requested port id.
In contrast to the normal recvFunctional, recvAtomic and recvTiming
that are pure virtual functions, the recvFunctionalSnoop,
recvAtomicSnoop and recvTimingSnoop have a default implementation that
calls panic. This is to allow non-coherent master and slave ports to
not implement these functions.
2012-04-14 11:45:07 +02:00
|
|
|
}
|
|
|
|
|
2013-05-30 18:54:01 +02:00
|
|
|
template <typename SrcType, typename DstType>
|
MEM: Separate snoops and normal memory requests/responses
This patch introduces port access methods that separates snoop
request/responses from normal memory request/responses. The
differentiation is made for functional, atomic and timing accesses and
builds on the introduction of master and slave ports.
Before the introduction of this patch, the packets belonging to the
different phases of the protocol (request -> [forwarded snoop request
-> snoop response]* -> response) all use the same port access
functions, even though the snoop packets flow in the opposite
direction to the normal packet. That is, a coherent master sends
normal request and receives responses, but receives snoop requests and
sends snoop responses (vice versa for the slave). These two distinct
phases now use different access functions, as described below.
Starting with the functional access, a master sends a request to a
slave through sendFunctional, and the request packet is turned into a
response before the call returns. In a system without cache coherence,
this is all that is needed from the functional interface. For the
cache-coherent scenario, a slave also sends snoop requests to coherent
masters through sendFunctionalSnoop, with responses returned within
the same packet pointer. This is currently used by the bus and caches,
and the LSQ of the O3 CPU. The send/recvFunctional and
send/recvFunctionalSnoop are moved from the Port super class to the
appropriate subclass.
Atomic accesses follow the same flow as functional accesses, with
request being sent from master to slave through sendAtomic. In the
case of cache-coherent ports, a slave can send snoop requests to a
master through sendAtomicSnoop. Just as for the functional access
methods, the atomic send and receive member functions are moved to the
appropriate subclasses.
The timing access methods are different from the functional and atomic
in that requests and responses are separated in time and
send/recvTiming are used for both directions. Hence, a master uses
sendTiming to send a request to a slave, and a slave uses sendTiming
to send a response back to a master, at a later point in time. Snoop
requests and responses travel in the opposite direction, similar to
what happens in functional and atomic accesses. With the introduction
of this patch, it is possible to determine the direction of packets in
the bus, and no longer necessary to look for both a master and a slave
port with the requested port id.
In contrast to the normal recvFunctional, recvAtomic and recvTiming
that are pure virtual functions, the recvFunctionalSnoop,
recvAtomicSnoop and recvTimingSnoop have a default implementation that
calls panic. This is to allow non-coherent master and slave ports to
not implement these functions.
2012-04-14 11:45:07 +02:00
|
|
|
void
|
2013-05-30 18:54:01 +02:00
|
|
|
BaseBus::Layer<SrcType,DstType>::releaseLayer()
|
2006-05-31 00:57:42 +02:00
|
|
|
{
|
2012-03-22 11:37:21 +01:00
|
|
|
// releasing the bus means we should now be idle
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
assert(state == BUSY);
|
2012-07-09 18:35:36 +02:00
|
|
|
assert(!releaseEvent.scheduled());
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
|
|
|
|
// update the state
|
|
|
|
state = IDLE;
|
2012-03-22 11:37:21 +01:00
|
|
|
|
2013-03-26 19:46:47 +01:00
|
|
|
// bus layer is now idle, so if someone is waiting we can retry
|
|
|
|
if (!waitingForLayer.empty()) {
|
2014-09-03 13:42:53 +02:00
|
|
|
// there is no point in sending a retry if someone is still
|
|
|
|
// waiting for the peer
|
|
|
|
if (waitingForPeer == NULL)
|
|
|
|
retryWaiting();
|
2013-05-30 18:53:57 +02:00
|
|
|
} else if (waitingForPeer == NULL && drainManager) {
|
2012-11-02 17:32:01 +01:00
|
|
|
DPRINTF(Drain, "Bus done draining, signaling drain manager\n");
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
//If we weren't able to drain before, do it now.
|
2012-11-02 17:32:01 +01:00
|
|
|
drainManager->signalDrainDone();
|
2006-11-09 17:33:44 +01:00
|
|
|
// Clear the drain event once we're done with it.
|
2012-11-02 17:32:01 +01:00
|
|
|
drainManager = NULL;
|
2006-11-09 17:33:44 +01:00
|
|
|
}
|
2006-05-31 00:57:42 +02:00
|
|
|
}
|
|
|
|
|
2013-05-30 18:54:01 +02:00
|
|
|
template <typename SrcType, typename DstType>
|
2012-03-22 11:37:21 +01:00
|
|
|
void
|
2013-05-30 18:54:01 +02:00
|
|
|
BaseBus::Layer<SrcType,DstType>::retryWaiting()
|
2012-03-22 11:37:21 +01:00
|
|
|
{
|
2013-03-26 19:46:47 +01:00
|
|
|
// this should never be called with no one waiting
|
|
|
|
assert(!waitingForLayer.empty());
|
2012-03-22 11:37:21 +01:00
|
|
|
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
// we always go to retrying from idle
|
|
|
|
assert(state == IDLE);
|
|
|
|
|
2013-03-26 19:46:46 +01:00
|
|
|
// update the state
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
state = RETRY;
|
2012-03-22 11:37:21 +01:00
|
|
|
|
2013-03-26 19:46:46 +01:00
|
|
|
// set the retrying port to the front of the retry list and pop it
|
|
|
|
// off the list
|
2014-09-03 13:42:53 +02:00
|
|
|
SrcType* retryingPort = waitingForLayer.front();
|
2013-03-26 19:46:47 +01:00
|
|
|
waitingForLayer.pop_front();
|
2013-03-26 19:46:46 +01:00
|
|
|
|
2013-03-26 19:46:47 +01:00
|
|
|
// tell the port to retry, which in some cases ends up calling the
|
|
|
|
// bus
|
2013-03-26 19:46:46 +01:00
|
|
|
retryingPort->sendRetry();
|
2012-03-22 11:37:21 +01:00
|
|
|
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
// If the bus is still in the retry state, sendTiming wasn't
|
2013-03-26 19:46:47 +01:00
|
|
|
// called in zero time (e.g. the cache does this), burn a cycle
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
if (state == RETRY) {
|
2013-03-26 19:46:47 +01:00
|
|
|
// update the state to busy and reset the retrying port, we
|
|
|
|
// have done our bit and sent the retry
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
state = BUSY;
|
|
|
|
|
2013-02-19 11:56:06 +01:00
|
|
|
// occupy the bus layer until the next cycle ends
|
|
|
|
occupyLayer(bus.clockEdge(Cycles(1)));
|
2012-03-22 11:37:21 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-05-30 18:54:01 +02:00
|
|
|
template <typename SrcType, typename DstType>
|
2012-03-22 11:37:21 +01:00
|
|
|
void
|
2013-05-30 18:54:01 +02:00
|
|
|
BaseBus::Layer<SrcType,DstType>::recvRetry()
|
2012-03-22 11:37:21 +01:00
|
|
|
{
|
2013-03-26 19:46:47 +01:00
|
|
|
// we should never get a retry without having failed to forward
|
|
|
|
// something to this port
|
2013-05-30 18:54:01 +02:00
|
|
|
assert(waitingForPeer != NULL);
|
2013-03-26 19:46:47 +01:00
|
|
|
|
2013-05-30 18:54:01 +02:00
|
|
|
// add the port where the failed packet originated to the front of
|
|
|
|
// the waiting ports for the layer, this allows us to call retry
|
|
|
|
// on the port immediately if the bus layer is idle
|
|
|
|
waitingForLayer.push_front(waitingForPeer);
|
2013-03-26 19:46:47 +01:00
|
|
|
|
2013-05-30 18:54:01 +02:00
|
|
|
// we are no longer waiting for the peer
|
|
|
|
waitingForPeer = NULL;
|
2013-03-26 19:46:47 +01:00
|
|
|
|
|
|
|
// if the bus layer is idle, retry this port straight away, if we
|
|
|
|
// are busy, then simply let the port wait for its turn
|
Bus: Replace tickNextIdle and inRetry with a state variable
This patch adds a state enum and member variable in the bus, tracking
the bus state, thus eliminating the need for tickNextIdle and inRetry,
and fixing an issue that allowed the bus to be occupied by multiple
packets at once (hopefully it also makes it easier to understand the
code).
The bus, in its current form, uses tickNextIdle and inRetry to keep
track of the state of the bus. However, it only updates tickNextIdle
_after_ forwarding a packet using sendTiming, and the result is that
the bus is still seen as idle, and a module that receives the packet
and starts transmitting new packets in zero time will still see the
bus as idle (and this is done by a number of DMA devices). The issue
can also be seen in isOccupied where the bus calls reschedule on an
event instead of schedule.
This patch addresses the problem by marking the bus as _not_ idle
already by the time we conclude that the bus is not occupied and we
will deal with the packet.
As a result of not allowing multiple packets to occupy the bus, some
regressions have slight changes in their statistics. A separate patch
updates these accordingly.
Further ahead, a follow-on patch will introduce a separate state
variable for request/responses/snoop responses, and thus implement a
split request/response bus with separate flow control for the
different message types (even further ahead it will introduce a
multi-layer bus).
2012-07-09 18:35:35 +02:00
|
|
|
if (state == IDLE) {
|
2012-03-22 11:37:21 +01:00
|
|
|
retryWaiting();
|
2013-03-26 19:46:47 +01:00
|
|
|
} else {
|
|
|
|
assert(state == BUSY);
|
2012-03-22 11:37:21 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-05-30 11:29:42 +02:00
|
|
|
PortID
|
Bus: Split the bus into a non-coherent and coherent bus
This patch introduces a class hierarchy of buses, a non-coherent one,
and a coherent one, splitting the existing bus functionality. By doing
so it also enables further specialisation of the two types of buses.
A non-coherent bus connects a number of non-snooping masters and
slaves, and routes the request and response packets based on the
address. The request packets issued by the master connected to a
non-coherent bus could still snoop in caches attached to a coherent
bus, as is the case with the I/O bus and memory bus in most system
configurations. No snoops will, however, reach any master on the
non-coherent bus itself. The non-coherent bus can be used as a
template for modelling PCI, PCIe, and non-coherent AMBA and OCP buses,
and is typically used for the I/O buses.
A coherent bus connects a number of (potentially) snooping masters and
slaves, and routes the request and response packets based on the
address, and also forwards all requests to the snoopers and deals with
the snoop responses. The coherent bus can be used as a template for
modelling QPI, HyperTransport, ACE and coherent OCP buses, and is
typically used for the L1-to-L2 buses and as the main system
interconnect.
The configuration scripts are updated to use a NoncoherentBus for all
peripheral and I/O buses.
A bit of minor tidying up has also been done.
--HG--
rename : src/mem/bus.cc => src/mem/coherent_bus.cc
rename : src/mem/bus.hh => src/mem/coherent_bus.hh
rename : src/mem/bus.cc => src/mem/noncoherent_bus.cc
rename : src/mem/bus.hh => src/mem/noncoherent_bus.hh
2012-05-31 19:30:04 +02:00
|
|
|
BaseBus::findPort(Addr addr)
|
2006-03-26 00:31:20 +01:00
|
|
|
{
|
2012-10-15 14:07:04 +02:00
|
|
|
// we should never see any address lookups before we've got the
|
|
|
|
// ranges of all connected slave modules
|
|
|
|
assert(gotAllAddrRanges);
|
|
|
|
|
|
|
|
// Check the cache
|
2012-05-30 11:29:42 +02:00
|
|
|
PortID dest_id = checkPortCache(addr);
|
|
|
|
if (dest_id != InvalidPortID)
|
2010-08-17 14:06:21 +02:00
|
|
|
return dest_id;
|
|
|
|
|
2012-10-15 14:07:04 +02:00
|
|
|
// Check the address map interval tree
|
|
|
|
PortMapConstIter i = portMap.find(addr);
|
2010-08-17 14:06:21 +02:00
|
|
|
if (i != portMap.end()) {
|
|
|
|
dest_id = i->second;
|
2012-10-15 14:07:04 +02:00
|
|
|
updatePortCache(dest_id, i->first);
|
2010-08-17 14:06:21 +02:00
|
|
|
return dest_id;
|
2007-08-04 22:05:55 +02:00
|
|
|
}
|
2006-07-06 20:41:01 +02:00
|
|
|
|
|
|
|
// Check if this matches the default range
|
2010-08-17 14:06:21 +02:00
|
|
|
if (useDefaultRange) {
|
2013-01-07 19:05:38 +01:00
|
|
|
if (defaultRange.contains(addr)) {
|
2012-10-15 14:07:04 +02:00
|
|
|
DPRINTF(BusAddrRanges, " found addr %#llx on default\n",
|
|
|
|
addr);
|
|
|
|
return defaultPortID;
|
2006-07-06 20:41:01 +02:00
|
|
|
}
|
2012-05-30 11:29:42 +02:00
|
|
|
} else if (defaultPortID != InvalidPortID) {
|
Bus: Split the bus into a non-coherent and coherent bus
This patch introduces a class hierarchy of buses, a non-coherent one,
and a coherent one, splitting the existing bus functionality. By doing
so it also enables further specialisation of the two types of buses.
A non-coherent bus connects a number of non-snooping masters and
slaves, and routes the request and response packets based on the
address. The request packets issued by the master connected to a
non-coherent bus could still snoop in caches attached to a coherent
bus, as is the case with the I/O bus and memory bus in most system
configurations. No snoops will, however, reach any master on the
non-coherent bus itself. The non-coherent bus can be used as a
template for modelling PCI, PCIe, and non-coherent AMBA and OCP buses,
and is typically used for the I/O buses.
A coherent bus connects a number of (potentially) snooping masters and
slaves, and routes the request and response packets based on the
address, and also forwards all requests to the snoopers and deals with
the snoop responses. The coherent bus can be used as a template for
modelling QPI, HyperTransport, ACE and coherent OCP buses, and is
typically used for the L1-to-L2 buses and as the main system
interconnect.
The configuration scripts are updated to use a NoncoherentBus for all
peripheral and I/O buses.
A bit of minor tidying up has also been done.
--HG--
rename : src/mem/bus.cc => src/mem/coherent_bus.cc
rename : src/mem/bus.hh => src/mem/coherent_bus.hh
rename : src/mem/bus.cc => src/mem/noncoherent_bus.cc
rename : src/mem/bus.hh => src/mem/noncoherent_bus.hh
2012-05-31 19:30:04 +02:00
|
|
|
DPRINTF(BusAddrRanges, "Unable to find destination for addr %#llx, "
|
2012-02-24 17:40:29 +01:00
|
|
|
"will use default port\n", addr);
|
2012-05-30 11:29:42 +02:00
|
|
|
return defaultPortID;
|
2006-07-06 20:41:01 +02:00
|
|
|
}
|
|
|
|
|
2012-02-24 17:40:29 +01:00
|
|
|
// we should use the range for the default port and it did not
|
|
|
|
// match, or the default port is not set
|
|
|
|
fatal("Unable to find destination for addr %#llx on bus %s\n", addr,
|
|
|
|
name());
|
2006-03-26 00:31:20 +01:00
|
|
|
}
|
|
|
|
|
2012-01-17 19:55:09 +01:00
|
|
|
/** Function called by the port when the bus is receiving a range change.*/
|
2006-03-26 00:31:20 +01:00
|
|
|
void
|
Bus: Split the bus into a non-coherent and coherent bus
This patch introduces a class hierarchy of buses, a non-coherent one,
and a coherent one, splitting the existing bus functionality. By doing
so it also enables further specialisation of the two types of buses.
A non-coherent bus connects a number of non-snooping masters and
slaves, and routes the request and response packets based on the
address. The request packets issued by the master connected to a
non-coherent bus could still snoop in caches attached to a coherent
bus, as is the case with the I/O bus and memory bus in most system
configurations. No snoops will, however, reach any master on the
non-coherent bus itself. The non-coherent bus can be used as a
template for modelling PCI, PCIe, and non-coherent AMBA and OCP buses,
and is typically used for the I/O buses.
A coherent bus connects a number of (potentially) snooping masters and
slaves, and routes the request and response packets based on the
address, and also forwards all requests to the snoopers and deals with
the snoop responses. The coherent bus can be used as a template for
modelling QPI, HyperTransport, ACE and coherent OCP buses, and is
typically used for the L1-to-L2 buses and as the main system
interconnect.
The configuration scripts are updated to use a NoncoherentBus for all
peripheral and I/O buses.
A bit of minor tidying up has also been done.
--HG--
rename : src/mem/bus.cc => src/mem/coherent_bus.cc
rename : src/mem/bus.hh => src/mem/coherent_bus.hh
rename : src/mem/bus.cc => src/mem/noncoherent_bus.cc
rename : src/mem/bus.hh => src/mem/noncoherent_bus.hh
2012-05-31 19:30:04 +02:00
|
|
|
BaseBus::recvRangeChange(PortID master_port_id)
|
2006-03-26 00:31:20 +01:00
|
|
|
{
|
2013-01-07 19:05:38 +01:00
|
|
|
DPRINTF(BusAddrRanges, "Received range change from slave port %s\n",
|
|
|
|
masterPorts[master_port_id]->getSlavePort().name());
|
|
|
|
|
2012-10-15 14:07:04 +02:00
|
|
|
// remember that we got a range from this master port and thus the
|
|
|
|
// connected slave module
|
|
|
|
gotAddrRanges[master_port_id] = true;
|
|
|
|
|
|
|
|
// update the global flag
|
|
|
|
if (!gotAllAddrRanges) {
|
|
|
|
// take a logical AND of all the ports and see if we got
|
|
|
|
// ranges from everyone
|
|
|
|
gotAllAddrRanges = true;
|
|
|
|
std::vector<bool>::const_iterator r = gotAddrRanges.begin();
|
|
|
|
while (gotAllAddrRanges && r != gotAddrRanges.end()) {
|
|
|
|
gotAllAddrRanges &= *r++;
|
|
|
|
}
|
2013-01-07 19:05:38 +01:00
|
|
|
if (gotAllAddrRanges)
|
|
|
|
DPRINTF(BusAddrRanges, "Got address ranges from all slaves\n");
|
2012-10-15 14:07:04 +02:00
|
|
|
}
|
2006-04-07 22:26:22 +02:00
|
|
|
|
2012-10-15 14:07:04 +02:00
|
|
|
// note that we could get the range from the default port at any
|
|
|
|
// point in time, and we cannot assume that the default range is
|
|
|
|
// set before the other ones are, so we do additional checks once
|
|
|
|
// all ranges are provided
|
2012-05-30 11:30:24 +02:00
|
|
|
if (master_port_id == defaultPortID) {
|
2012-10-15 14:07:04 +02:00
|
|
|
// only update if we are indeed checking ranges for the
|
|
|
|
// default port since the port might not have a valid range
|
|
|
|
// otherwise
|
2010-08-17 14:06:21 +02:00
|
|
|
if (useDefaultRange) {
|
2012-10-15 14:07:04 +02:00
|
|
|
AddrRangeList ranges = masterPorts[master_port_id]->getAddrRanges();
|
2006-04-20 23:14:30 +02:00
|
|
|
|
2012-10-15 14:07:04 +02:00
|
|
|
if (ranges.size() != 1)
|
|
|
|
fatal("Bus %s may only have a single default range",
|
|
|
|
name());
|
2006-07-06 20:41:01 +02:00
|
|
|
|
2012-10-15 14:07:04 +02:00
|
|
|
defaultRange = ranges.front();
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// the ports are allowed to update their address ranges
|
|
|
|
// dynamically, so remove any existing entries
|
|
|
|
if (gotAddrRanges[master_port_id]) {
|
|
|
|
for (PortMapIter p = portMap.begin(); p != portMap.end(); ) {
|
|
|
|
if (p->second == master_port_id)
|
|
|
|
// erasing invalidates the iterator, so advance it
|
|
|
|
// before the deletion takes place
|
|
|
|
portMap.erase(p++);
|
|
|
|
else
|
|
|
|
p++;
|
|
|
|
}
|
2006-07-06 20:41:01 +02:00
|
|
|
}
|
2006-04-06 06:51:46 +02:00
|
|
|
|
2012-10-15 14:07:04 +02:00
|
|
|
AddrRangeList ranges = masterPorts[master_port_id]->getAddrRanges();
|
2006-08-22 22:08:18 +02:00
|
|
|
|
2012-10-15 14:07:04 +02:00
|
|
|
for (AddrRangeConstIter r = ranges.begin(); r != ranges.end(); ++r) {
|
2013-01-07 19:05:38 +01:00
|
|
|
DPRINTF(BusAddrRanges, "Adding range %s for id %d\n",
|
|
|
|
r->to_string(), master_port_id);
|
2012-10-15 14:07:04 +02:00
|
|
|
if (portMap.insert(*r, master_port_id) == portMap.end()) {
|
|
|
|
PortID conflict_id = portMap.find(*r)->second;
|
2008-06-21 07:06:27 +02:00
|
|
|
fatal("%s has two ports with same range:\n\t%s\n\t%s\n",
|
2012-05-30 11:30:24 +02:00
|
|
|
name(),
|
|
|
|
masterPorts[master_port_id]->getSlavePort().name(),
|
MEM: Introduce the master/slave port sub-classes in C++
This patch introduces the notion of a master and slave port in the C++
code, thus bringing the previous classification from the Python
classes into the corresponding simulation objects and memory objects.
The patch enables us to classify behaviours into the two bins and add
assumptions and enfore compliance, also simplifying the two
interfaces. As a starting point, isSnooping is confined to a master
port, and getAddrRanges to slave ports. More of these specilisations
are to come in later patches.
The getPort function is not getMasterPort and getSlavePort, and
returns a port reference rather than a pointer as NULL would never be
a valid return value. The default implementation of these two
functions is placed in MemObject, and calls fatal.
The one drawback with this specific patch is that it requires some
code duplication, e.g. QueuedPort becomes QueuedMasterPort and
QueuedSlavePort, and BusPort becomes BusMasterPort and BusSlavePort
(avoiding multiple inheritance). With the later introduction of the
port interfaces, moving the functionality outside the port itself, a
lot of the duplicated code will disappear again.
2012-03-30 15:40:11 +02:00
|
|
|
masterPorts[conflict_id]->getSlavePort().name());
|
2008-06-21 07:06:27 +02:00
|
|
|
}
|
2006-07-06 20:41:01 +02:00
|
|
|
}
|
2006-04-20 23:14:30 +02:00
|
|
|
}
|
2006-04-28 21:37:48 +02:00
|
|
|
|
2012-10-15 14:07:04 +02:00
|
|
|
// if we have received ranges from all our neighbouring slave
|
|
|
|
// modules, go ahead and tell our connected master modules in
|
|
|
|
// turn, this effectively assumes a tree structure of the system
|
|
|
|
if (gotAllAddrRanges) {
|
2013-03-01 19:20:19 +01:00
|
|
|
DPRINTF(BusAddrRanges, "Aggregating bus ranges\n");
|
|
|
|
busRanges.clear();
|
|
|
|
|
|
|
|
// start out with the default range
|
|
|
|
if (useDefaultRange) {
|
|
|
|
if (!gotAddrRanges[defaultPortID])
|
|
|
|
fatal("Bus %s uses default range, but none provided",
|
|
|
|
name());
|
|
|
|
|
|
|
|
busRanges.push_back(defaultRange);
|
|
|
|
DPRINTF(BusAddrRanges, "-- Adding default %s\n",
|
|
|
|
defaultRange.to_string());
|
|
|
|
}
|
|
|
|
|
|
|
|
// merge all interleaved ranges and add any range that is not
|
|
|
|
// a subset of the default range
|
|
|
|
std::vector<AddrRange> intlv_ranges;
|
|
|
|
for (AddrRangeMap<PortID>::const_iterator r = portMap.begin();
|
|
|
|
r != portMap.end(); ++r) {
|
|
|
|
// if the range is interleaved then save it for now
|
|
|
|
if (r->first.interleaved()) {
|
|
|
|
// if we already got interleaved ranges that are not
|
|
|
|
// part of the same range, then first do a merge
|
|
|
|
// before we add the new one
|
|
|
|
if (!intlv_ranges.empty() &&
|
|
|
|
!intlv_ranges.back().mergesWith(r->first)) {
|
|
|
|
DPRINTF(BusAddrRanges, "-- Merging range from %d ranges\n",
|
|
|
|
intlv_ranges.size());
|
|
|
|
AddrRange merged_range(intlv_ranges);
|
|
|
|
// next decide if we keep the merged range or not
|
|
|
|
if (!(useDefaultRange &&
|
|
|
|
merged_range.isSubset(defaultRange))) {
|
|
|
|
busRanges.push_back(merged_range);
|
|
|
|
DPRINTF(BusAddrRanges, "-- Adding merged range %s\n",
|
|
|
|
merged_range.to_string());
|
|
|
|
}
|
|
|
|
intlv_ranges.clear();
|
|
|
|
}
|
|
|
|
intlv_ranges.push_back(r->first);
|
|
|
|
} else {
|
|
|
|
// keep the current range if not a subset of the default
|
|
|
|
if (!(useDefaultRange &&
|
|
|
|
r->first.isSubset(defaultRange))) {
|
|
|
|
busRanges.push_back(r->first);
|
|
|
|
DPRINTF(BusAddrRanges, "-- Adding range %s\n",
|
|
|
|
r->first.to_string());
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// if there is still interleaved ranges waiting to be merged,
|
|
|
|
// go ahead and do it
|
|
|
|
if (!intlv_ranges.empty()) {
|
|
|
|
DPRINTF(BusAddrRanges, "-- Merging range from %d ranges\n",
|
|
|
|
intlv_ranges.size());
|
|
|
|
AddrRange merged_range(intlv_ranges);
|
|
|
|
if (!(useDefaultRange && merged_range.isSubset(defaultRange))) {
|
|
|
|
busRanges.push_back(merged_range);
|
|
|
|
DPRINTF(BusAddrRanges, "-- Adding merged range %s\n",
|
|
|
|
merged_range.to_string());
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-10-15 14:07:04 +02:00
|
|
|
// also check that no range partially overlaps with the
|
|
|
|
// default range, this has to be done after all ranges are set
|
|
|
|
// as there are no guarantees for when the default range is
|
|
|
|
// update with respect to the other ones
|
|
|
|
if (useDefaultRange) {
|
2013-03-01 19:20:19 +01:00
|
|
|
for (AddrRangeConstIter r = busRanges.begin();
|
|
|
|
r != busRanges.end(); ++r) {
|
|
|
|
// see if the new range is partially
|
|
|
|
// overlapping the default range
|
|
|
|
if (r->intersects(defaultRange) &&
|
|
|
|
!r->isSubset(defaultRange))
|
|
|
|
fatal("Range %s intersects the " \
|
|
|
|
"default range of %s but is not a " \
|
|
|
|
"subset\n", r->to_string(), name());
|
2012-10-15 14:07:04 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// tell all our neighbouring master ports that our address
|
|
|
|
// ranges have changed
|
|
|
|
for (SlavePortConstIter s = slavePorts.begin(); s != slavePorts.end();
|
|
|
|
++s)
|
|
|
|
(*s)->sendRangeChange();
|
|
|
|
}
|
2006-07-06 20:41:01 +02:00
|
|
|
|
2012-10-15 14:07:04 +02:00
|
|
|
clearPortCache();
|
2006-03-26 00:31:20 +01:00
|
|
|
}
|
|
|
|
|
2012-01-17 19:55:09 +01:00
|
|
|
AddrRangeList
|
2012-07-09 18:35:34 +02:00
|
|
|
BaseBus::getAddrRanges() const
|
2006-03-26 00:31:20 +01:00
|
|
|
{
|
2012-10-15 14:07:04 +02:00
|
|
|
// we should never be asked without first having sent a range
|
|
|
|
// change, and the latter is only done once we have all the ranges
|
|
|
|
// of the connected devices
|
|
|
|
assert(gotAllAddrRanges);
|
2006-04-28 21:37:48 +02:00
|
|
|
|
2013-01-07 19:05:38 +01:00
|
|
|
// at the moment, this never happens, as there are no cycles in
|
|
|
|
// the range queries and no devices on the master side of a bus
|
|
|
|
// (CPU, cache, bridge etc) actually care about the ranges of the
|
|
|
|
// ports they are connected to
|
|
|
|
|
2013-03-01 19:20:19 +01:00
|
|
|
DPRINTF(BusAddrRanges, "Received address range request\n");
|
2006-11-14 01:56:34 +01:00
|
|
|
|
2013-03-01 19:20:19 +01:00
|
|
|
return busRanges;
|
2012-01-17 19:55:09 +01:00
|
|
|
}
|
|
|
|
|
2013-05-30 18:53:58 +02:00
|
|
|
void
|
|
|
|
BaseBus::regStats()
|
|
|
|
{
|
|
|
|
using namespace Stats;
|
|
|
|
|
|
|
|
transDist
|
|
|
|
.init(MemCmd::NUM_MEM_CMDS)
|
|
|
|
.name(name() + ".trans_dist")
|
|
|
|
.desc("Transaction distribution")
|
|
|
|
.flags(nozero);
|
|
|
|
|
|
|
|
// get the string representation of the commands
|
|
|
|
for (int i = 0; i < MemCmd::NUM_MEM_CMDS; i++) {
|
|
|
|
MemCmd cmd(i);
|
|
|
|
const std::string &cstr = cmd.toString();
|
|
|
|
transDist.subname(i, cstr);
|
|
|
|
}
|
|
|
|
|
|
|
|
pktCount
|
|
|
|
.init(slavePorts.size(), masterPorts.size())
|
|
|
|
.name(name() + ".pkt_count")
|
|
|
|
.desc("Packet count per connected master and slave (bytes)")
|
|
|
|
.flags(total | nozero | nonan);
|
|
|
|
|
|
|
|
totPktSize
|
|
|
|
.init(slavePorts.size(), masterPorts.size())
|
|
|
|
.name(name() + ".tot_pkt_size")
|
|
|
|
.desc("Cumulative packet size per connected master and slave (bytes)")
|
|
|
|
.flags(total | nozero | nonan);
|
|
|
|
|
|
|
|
// both the packet count and total size are two-dimensional
|
|
|
|
// vectors, indexed by slave port id and master port id, thus the
|
|
|
|
// neighbouring master and slave, they do not differentiate what
|
|
|
|
// came from the master and was forwarded to the slave (requests
|
|
|
|
// and snoop responses) and what came from the slave and was
|
|
|
|
// forwarded to the master (responses and snoop requests)
|
|
|
|
for (int i = 0; i < slavePorts.size(); i++) {
|
|
|
|
pktCount.subname(i, slavePorts[i]->getMasterPort().name());
|
|
|
|
totPktSize.subname(i, slavePorts[i]->getMasterPort().name());
|
|
|
|
for (int j = 0; j < masterPorts.size(); j++) {
|
|
|
|
pktCount.ysubname(j, masterPorts[j]->getSlavePort().name());
|
|
|
|
totPktSize.ysubname(j, masterPorts[j]->getSlavePort().name());
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-05-30 18:54:01 +02:00
|
|
|
template <typename SrcType, typename DstType>
|
2006-11-02 01:00:49 +01:00
|
|
|
unsigned int
|
2013-05-30 18:54:01 +02:00
|
|
|
BaseBus::Layer<SrcType,DstType>::drain(DrainManager *dm)
|
2006-11-02 01:00:49 +01:00
|
|
|
{
|
|
|
|
//We should check that we're not "doing" anything, and that noone is
|
|
|
|
//waiting. We might be idle but have someone waiting if the device we
|
|
|
|
//contacted for a retry didn't actually retry.
|
2013-03-26 19:46:47 +01:00
|
|
|
if (state != IDLE) {
|
2012-08-15 16:38:08 +02:00
|
|
|
DPRINTF(Drain, "Bus not drained\n");
|
2012-11-02 17:32:01 +01:00
|
|
|
drainManager = dm;
|
2006-11-02 01:00:49 +01:00
|
|
|
return 1;
|
|
|
|
}
|
2007-09-05 23:12:41 +02:00
|
|
|
return 0;
|
2006-11-02 01:00:49 +01:00
|
|
|
}
|
2012-07-09 18:35:37 +02:00
|
|
|
|
2013-05-30 18:54:01 +02:00
|
|
|
template <typename SrcType, typename DstType>
|
2013-05-30 18:53:58 +02:00
|
|
|
void
|
2013-05-30 18:54:01 +02:00
|
|
|
BaseBus::Layer<SrcType,DstType>::regStats()
|
2013-05-30 18:53:58 +02:00
|
|
|
{
|
|
|
|
using namespace Stats;
|
|
|
|
|
|
|
|
occupancy
|
|
|
|
.name(name() + ".occupancy")
|
|
|
|
.desc("Layer occupancy (ticks)")
|
|
|
|
.flags(nozero);
|
|
|
|
|
|
|
|
utilization
|
|
|
|
.name(name() + ".utilization")
|
|
|
|
.desc("Layer utilization (%)")
|
|
|
|
.precision(1)
|
|
|
|
.flags(nozero);
|
|
|
|
|
|
|
|
utilization = 100 * occupancy / simTicks;
|
|
|
|
}
|
|
|
|
|
2012-07-09 18:35:37 +02:00
|
|
|
/**
|
|
|
|
* Bus layer template instantiations. Could be removed with _impl.hh
|
|
|
|
* file, but since there are only two given options (MasterPort and
|
|
|
|
* SlavePort) it seems a bit excessive at this point.
|
|
|
|
*/
|
2013-05-30 18:54:01 +02:00
|
|
|
template class BaseBus::Layer<SlavePort,MasterPort>;
|
|
|
|
template class BaseBus::Layer<MasterPort,SlavePort>;
|