2003-11-03 02:43:39 +01:00
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/*
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2006-03-01 00:41:04 +01:00
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* Copyright (c) 2003-2006 The Regents of The University of Michigan
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2003-11-03 02:43:39 +01:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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2005-04-22 19:12:03 +02:00
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#include <errno.h>
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2004-07-02 00:03:05 +02:00
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#include <fcntl.h>
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2004-07-02 18:30:06 +02:00
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#include <unistd.h>
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2004-07-02 00:03:05 +02:00
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#include <cstdio>
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2004-07-02 18:30:06 +02:00
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2003-11-03 02:52:40 +01:00
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#include <string>
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2006-02-12 23:38:10 +01:00
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#include "sim/pseudo_inst.hh"
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2006-02-27 11:35:43 +01:00
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#include "arch/vtophys.hh"
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2005-06-05 02:50:10 +02:00
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#include "cpu/base.hh"
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#include "cpu/sampler/sampler.hh"
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2003-11-03 02:43:39 +01:00
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#include "cpu/exec_context.hh"
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2006-05-16 19:51:18 +02:00
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#include "cpu/quiesce_event.hh"
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2004-08-20 17:35:31 +02:00
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#include "kern/kernel_stats.hh"
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2003-11-03 02:52:40 +01:00
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#include "sim/param.hh"
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2003-11-03 02:43:39 +01:00
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#include "sim/serialize.hh"
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#include "sim/sim_exit.hh"
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2004-05-04 23:01:00 +02:00
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#include "sim/stat_control.hh"
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#include "sim/stats.hh"
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2004-07-02 00:03:05 +02:00
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#include "sim/system.hh"
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2004-08-02 23:10:02 +02:00
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#include "sim/debug.hh"
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2006-02-12 18:40:58 +01:00
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#include "sim/vptr.hh"
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2003-11-03 02:43:39 +01:00
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2003-11-03 02:52:40 +01:00
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using namespace std;
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2004-08-02 23:10:02 +02:00
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2005-06-05 08:59:43 +02:00
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extern Sampler *SampCPU;
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2004-08-02 23:10:02 +02:00
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2004-05-21 19:39:20 +02:00
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using namespace Stats;
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Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths.
arch/alpha/alpha_linux_process.cc:
Added using directive for AlphaISA namespace
arch/alpha/alpha_memory.hh:
arch/alpha/isa/branch.isa:
cpu/pc_event.hh:
Added typedefs for Addr
arch/alpha/alpha_tru64_process.cc:
arch/alpha/arguments.cc:
Added using directive for AlphaISA
arch/alpha/ev5.hh:
Added an include of arch/alpha/isa_traits.hh, and a using directive for the AlphaISA namespace.
arch/alpha/faults.hh:
Added a typedef for the Addr type, and changed the formatting of the faults slightly.
arch/alpha/isa/main.isa:
Untemplatized StaticInst, added a using for namespace AlphaISA to show up in decoder.cc and the exec.ccs, relocated makeNop to decoder.hh
arch/alpha/isa/mem.isa:
Untemplatized StaticInst and StaticInstPtr
arch/alpha/isa/pal.isa:
cpu/base_dyn_inst.cc:
Untemplatized StaticInstPtr
arch/alpha/isa_traits.hh:
Changed variables to be externs instead of static since they are part of a namespace and not a class.
arch/alpha/stacktrace.cc:
Untemplatized StaticInstPtr, and added a using directive for AlphaISA.
arch/alpha/stacktrace.hh:
Added some typedefs for Addr and MachInst, and untemplatized StaticInstPtr
arch/alpha/vtophys.cc:
Added a using directive for AlphaISA
arch/alpha/vtophys.hh:
Added the AlphaISA namespace specifier where needed
arch/isa_parser.py:
Changed the placement of the definition of the decodeInst function to be outside the namespaceInst namespace.
base/loader/object_file.hh:
cpu/o3/bpred_unit.hh:
Added a typedef for Addr
base/loader/symtab.hh:
Added a typedef for Addr, and added a TheISA to Addr in another typedef
base/remote_gdb.cc:
Added a using namespace TheISA, and untemplatized StaticInstPtr
base/remote_gdb.hh:
Added typedefs for Addr and MachInst
cpu/base.cc:
Added TheISA specifier to some variables exported from the isa.
cpu/base.hh:
Added a typedef for Addr, and TheISA to some variables from the ISA
cpu/base_dyn_inst.hh:
Untemplatized StaticInstPtr, and added TheISA specifier to some variables from the ISA.
cpu/exec_context.hh:
Added some typedefs for types from the isa, and added TheISA specifier to some variables from the isa
cpu/exetrace.hh:
Added typedefs for some types from the ISA, and untemplatized StaticInstPtr
cpu/memtest/memtest.cc:
cpu/o3/btb.cc:
dev/baddev.cc:
dev/ide_ctrl.cc:
dev/ide_disk.cc:
dev/isa_fake.cc:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/platform.cc:
dev/sinic.cc:
dev/uart8250.cc:
kern/freebsd/freebsd_system.cc:
kern/linux/linux_system.cc:
kern/system_events.cc:
kern/tru64/dump_mbuf.cc:
kern/tru64/tru64_events.cc:
sim/process.cc:
sim/pseudo_inst.cc:
sim/system.cc:
Added using namespace TheISA
cpu/memtest/memtest.hh:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/itx_reader.hh:
dev/ide_disk.hh:
dev/pcidev.hh:
dev/platform.hh:
dev/tsunami.hh:
sim/system.hh:
sim/vptr.hh:
Added typedef for Addr
cpu/o3/2bit_local_pred.hh:
Changed the include to use arch/isa_traits.hh instead of arch/alpha/isa_traits.hh. Added typedef for Addr
cpu/o3/alpha_cpu.hh:
Added typedefs for Addr and IntReg
cpu/o3/alpha_cpu_impl.hh:
Added this-> to setNextPC to fix a problem since it didn't depend on template parameters any more. Removed "typename" where it was no longer needed.
cpu/o3/alpha_dyn_inst.hh:
Cleaned up some typedefs, and untemplatized StaticInst
cpu/o3/alpha_dyn_inst_impl.hh:
untemplatized StaticInstPtr
cpu/o3/alpha_impl.hh:
Fixed up a typedef of MachInst
cpu/o3/bpred_unit_impl.hh:
Added a using TheISA::MachInst to a function
cpu/o3/btb.hh:
Changed an include from arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef for Addr
cpu/o3/commit.hh:
Removed a typedef of Impl::ISA as ISA, since TheISA takes care of this now.
cpu/o3/cpu.cc:
Cleaned up namespace issues
cpu/o3/cpu.hh:
Cleaned up namespace usage
cpu/o3/decode.hh:
Removed typedef of ISA, and changed it to TheISA
cpu/o3/fetch.hh:
Fized up typedefs, and changed ISA to TheISA
cpu/o3/free_list.hh:
Changed include of arch/alpha/isa_traits.hh to arch/isa_traits.hh
cpu/o3/iew.hh:
Removed typedef of ISA
cpu/o3/iew_impl.hh:
Added TheISA namespace specifier to MachInst
cpu/o3/ras.hh:
Changed include from arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef for Addr.
cpu/o3/regfile.hh:
Changed ISA to TheISA, and added some typedefs for Addr, IntReg, FloatReg, and MiscRegFile
cpu/o3/rename.hh:
Changed ISA to TheISA, and added a typedef for RegIndex
cpu/o3/rename_map.hh:
Added an include for arch/isa_traits.hh, and a typedef for RegIndex
cpu/o3/rob.hh:
Added a typedef for RegIndex
cpu/o3/store_set.hh:
cpu/o3/tournament_pred.hh:
Changed an include of arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef of Addr
cpu/ozone/cpu.hh:
Changed ISA into TheISA, and untemplatized StaticInst
cpu/pc_event.cc:
Added namespace specifier TheISA to Addr types
cpu/profile.hh:
kern/kernel_stats.hh:
Added typedef for Addr, and untemplatized StaticInstPtr
cpu/simple/cpu.cc:
Changed using directive from LittleEndianGuest to AlphaISA, which will contain both namespaces. Added TheISA where needed, and untemplatized StaticInst
cpu/simple/cpu.hh:
Added a typedef for MachInst, and untemplatized StaticInst
cpu/static_inst.cc:
Untemplatized StaticInst
cpu/static_inst.hh:
Untemplatized StaticInst by using the TheISA namespace
dev/alpha_console.cc:
Added using namespace AlphaISA
dev/simple_disk.hh:
Added typedef for Addr and fixed up some formatting
dev/sinicreg.hh:
Added TheISA namespace specifier where needed
dev/tsunami.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
Added using namespace TheISA. It might be better for it to be AlphaISA
dev/tsunami_cchip.cc:
Added typedef for TheISA. It might be better for it to be AlphaISA
kern/linux/aligned.hh:
sim/pseudo_inst.hh:
Added TheISA namespace specifier to Addr
kern/linux/linux_threadinfo.hh:
Added typedef for Addr, and TheISA namespace specifier to StackPointerReg
kern/tru64/mbuf.hh:
Added TheISA to Addr type in structs
sim/process.hh:
Added typedefs of Addr, RegFile, and MachInst
sim/syscall_emul.cc:
Added using namespace TheISA, and a cast of VMPageSize to the int type
sim/syscall_emul.hh:
Added typecast for Addr, and TheISA namespace specifier for where needed
--HG--
extra : convert_revision : 91d4f6ca33a73b21c1f1771d74bfdea3b80eff45
2006-02-19 08:34:37 +01:00
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using namespace TheISA;
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2003-11-03 02:43:39 +01:00
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namespace AlphaPseudo
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{
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2003-11-03 02:52:40 +01:00
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bool doStatisticsInsts;
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bool doCheckpointInsts;
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2003-11-03 22:47:08 +01:00
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bool doQuiesce;
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2004-05-13 14:03:36 +02:00
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void
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arm(ExecContext *xc)
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{
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2006-05-23 22:51:16 +02:00
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if (xc->getKernelStats())
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xc->getKernelStats()->arm();
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2004-05-13 14:03:36 +02:00
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}
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2003-11-03 22:47:08 +01:00
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void
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quiesce(ExecContext *xc)
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{
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if (!doQuiesce)
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return;
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2003-12-11 02:47:28 +01:00
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xc->suspend();
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2006-05-23 22:51:16 +02:00
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if (xc->getKernelStats())
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xc->getKernelStats()->arm();
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2003-11-03 22:47:08 +01:00
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}
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2003-11-03 02:52:40 +01:00
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2006-03-01 00:41:04 +01:00
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void
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quiesceNs(ExecContext *xc, uint64_t ns)
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{
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if (!doQuiesce || ns == 0)
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return;
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2006-05-16 19:51:18 +02:00
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EndQuiesceEvent *quiesceEvent = xc->getQuiesceEvent();
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2006-03-08 01:59:12 +01:00
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if (quiesceEvent->scheduled())
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quiesceEvent->reschedule(curTick + Clock::Int::ns * ns);
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2006-03-01 00:41:04 +01:00
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else
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2006-03-08 01:59:12 +01:00
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quiesceEvent->schedule(curTick + Clock::Int::ns * ns);
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2006-03-01 00:41:04 +01:00
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xc->suspend();
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2006-05-23 22:51:16 +02:00
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if (xc->getKernelStats())
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xc->getKernelStats()->quiesce();
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2006-03-01 00:41:04 +01:00
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}
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void
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quiesceCycles(ExecContext *xc, uint64_t cycles)
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{
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if (!doQuiesce || cycles == 0)
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return;
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2006-05-16 19:51:18 +02:00
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EndQuiesceEvent *quiesceEvent = xc->getQuiesceEvent();
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2006-03-08 01:59:12 +01:00
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if (quiesceEvent->scheduled())
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quiesceEvent->reschedule(curTick +
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xc->getCpuPtr()->cycles(cycles));
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2006-03-01 00:41:04 +01:00
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else
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2006-03-08 01:59:12 +01:00
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quiesceEvent->schedule(curTick +
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xc->getCpuPtr()->cycles(cycles));
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2006-03-01 00:41:04 +01:00
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xc->suspend();
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2006-05-23 22:51:16 +02:00
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if (xc->getKernelStats())
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xc->getKernelStats()->quiesce();
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2006-03-01 00:41:04 +01:00
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}
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uint64_t
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quiesceTime(ExecContext *xc)
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{
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2006-03-08 01:59:12 +01:00
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return (xc->readLastActivate() - xc->readLastSuspend()) / Clock::Int::ns;
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2006-03-01 00:41:04 +01:00
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}
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2004-05-13 14:03:36 +02:00
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void
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ivlb(ExecContext *xc)
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{
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2006-05-23 22:51:16 +02:00
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if (xc->getKernelStats())
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xc->getKernelStats()->ivlb();
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2004-05-13 14:03:36 +02:00
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}
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void
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ivle(ExecContext *xc)
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{
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}
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2003-11-03 02:43:39 +01:00
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void
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m5exit_old(ExecContext *xc)
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{
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SimExit(curTick, "m5_exit_old instruction encountered");
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}
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void
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2006-02-12 23:38:10 +01:00
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m5exit(ExecContext *xc, Tick delay)
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2003-11-03 02:43:39 +01:00
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{
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2005-03-29 14:55:44 +02:00
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Tick when = curTick + delay * Clock::Int::ns;
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2003-11-03 02:43:39 +01:00
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SimExit(when, "m5_exit instruction encountered");
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}
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void
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2006-02-12 23:38:10 +01:00
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resetstats(ExecContext *xc, Tick delay, Tick period)
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2003-11-03 02:43:39 +01:00
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{
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2003-11-03 02:52:40 +01:00
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if (!doStatisticsInsts)
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return;
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2003-11-03 02:43:39 +01:00
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2005-03-29 14:55:44 +02:00
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Tick when = curTick + delay * Clock::Int::ns;
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Tick repeat = period * Clock::Int::ns;
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2003-11-03 02:43:39 +01:00
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2004-05-21 19:39:20 +02:00
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using namespace Stats;
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2003-11-03 02:43:39 +01:00
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SetupEvent(Reset, when, repeat);
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}
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void
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2006-02-12 23:38:10 +01:00
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dumpstats(ExecContext *xc, Tick delay, Tick period)
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2003-11-03 02:43:39 +01:00
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{
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2003-11-03 02:52:40 +01:00
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if (!doStatisticsInsts)
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return;
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2003-11-03 02:43:39 +01:00
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2005-03-29 14:55:44 +02:00
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Tick when = curTick + delay * Clock::Int::ns;
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Tick repeat = period * Clock::Int::ns;
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2003-11-03 02:43:39 +01:00
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2004-05-21 19:39:20 +02:00
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using namespace Stats;
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2003-11-03 02:43:39 +01:00
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SetupEvent(Dump, when, repeat);
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}
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2005-11-19 07:25:34 +01:00
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void
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2006-02-12 23:38:10 +01:00
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addsymbol(ExecContext *xc, Addr addr, Addr symbolAddr)
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2005-11-19 07:25:34 +01:00
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{
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char symb[100];
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2006-02-12 23:38:10 +01:00
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CopyString(xc, symb, symbolAddr, 100);
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2005-11-19 07:25:34 +01:00
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std::string symbol(symb);
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DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
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2006-03-04 21:18:40 +01:00
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xc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
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2005-11-19 07:25:34 +01:00
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}
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2003-11-03 02:43:39 +01:00
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void
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2006-02-12 23:38:10 +01:00
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dumpresetstats(ExecContext *xc, Tick delay, Tick period)
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2003-11-03 02:43:39 +01:00
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{
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2003-11-03 02:52:40 +01:00
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if (!doStatisticsInsts)
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return;
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2003-11-03 02:43:39 +01:00
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2005-03-29 14:55:44 +02:00
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Tick when = curTick + delay * Clock::Int::ns;
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Tick repeat = period * Clock::Int::ns;
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2003-11-03 02:43:39 +01:00
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2004-05-21 19:39:20 +02:00
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using namespace Stats;
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2003-11-03 02:43:39 +01:00
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SetupEvent(Dump|Reset, when, repeat);
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}
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void
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2006-02-12 23:38:10 +01:00
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m5checkpoint(ExecContext *xc, Tick delay, Tick period)
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2003-11-03 02:43:39 +01:00
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{
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2003-11-03 02:52:40 +01:00
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if (!doCheckpointInsts)
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return;
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2003-11-03 02:43:39 +01:00
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2005-03-29 14:55:44 +02:00
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|
|
Tick when = curTick + delay * Clock::Int::ns;
|
|
|
|
Tick repeat = period * Clock::Int::ns;
|
2003-11-03 02:43:39 +01:00
|
|
|
|
2004-01-12 00:24:18 +01:00
|
|
|
Checkpoint::setup(when, repeat);
|
2003-11-03 02:43:39 +01:00
|
|
|
}
|
|
|
|
|
2006-02-12 23:38:10 +01:00
|
|
|
uint64_t
|
|
|
|
readfile(ExecContext *xc, Addr vaddr, uint64_t len, uint64_t offset)
|
2004-07-02 00:03:05 +02:00
|
|
|
{
|
2006-03-05 06:34:54 +01:00
|
|
|
const string &file = xc->getCpuPtr()->system->params()->readfile;
|
2004-07-02 00:03:05 +02:00
|
|
|
if (file.empty()) {
|
2006-02-12 23:38:10 +01:00
|
|
|
return ULL(0);
|
2004-07-02 00:03:05 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
uint64_t result = 0;
|
|
|
|
|
|
|
|
int fd = ::open(file.c_str(), O_RDONLY, 0);
|
|
|
|
if (fd < 0)
|
|
|
|
panic("could not open file %s\n", file);
|
|
|
|
|
2005-04-22 19:12:03 +02:00
|
|
|
if (::lseek(fd, offset, SEEK_SET) < 0)
|
|
|
|
panic("could not seek: %s", strerror(errno));
|
|
|
|
|
2004-07-02 00:03:05 +02:00
|
|
|
char *buf = new char[len];
|
|
|
|
char *p = buf;
|
|
|
|
while (len > 0) {
|
2005-04-22 19:12:03 +02:00
|
|
|
int bytes = ::read(fd, p, len);
|
2004-07-02 00:03:05 +02:00
|
|
|
if (bytes <= 0)
|
|
|
|
break;
|
|
|
|
|
|
|
|
p += bytes;
|
|
|
|
result += bytes;
|
|
|
|
len -= bytes;
|
|
|
|
}
|
|
|
|
|
|
|
|
close(fd);
|
|
|
|
CopyIn(xc, vaddr, buf, result);
|
|
|
|
delete [] buf;
|
2006-02-12 23:38:10 +01:00
|
|
|
return result;
|
2004-07-02 00:03:05 +02:00
|
|
|
}
|
|
|
|
|
2003-11-03 02:52:40 +01:00
|
|
|
class Context : public ParamContext
|
|
|
|
{
|
|
|
|
public:
|
|
|
|
Context(const string §ion) : ParamContext(section) {}
|
|
|
|
void checkParams();
|
|
|
|
};
|
|
|
|
|
2005-01-21 10:34:01 +01:00
|
|
|
Context context("pseudo_inst");
|
2003-11-03 02:52:40 +01:00
|
|
|
|
2003-11-03 22:47:08 +01:00
|
|
|
Param<bool> __quiesce(&context, "quiesce",
|
|
|
|
"enable quiesce instructions",
|
|
|
|
true);
|
2003-11-03 03:58:23 +01:00
|
|
|
Param<bool> __statistics(&context, "statistics",
|
2003-11-03 22:47:08 +01:00
|
|
|
"enable statistics pseudo instructions",
|
2003-11-03 04:12:20 +01:00
|
|
|
true);
|
2003-11-03 03:58:23 +01:00
|
|
|
Param<bool> __checkpoint(&context, "checkpoint",
|
2003-11-03 22:47:08 +01:00
|
|
|
"enable checkpoint pseudo instructions",
|
2003-11-03 04:12:20 +01:00
|
|
|
true);
|
2003-11-03 02:52:40 +01:00
|
|
|
|
|
|
|
void
|
|
|
|
Context::checkParams()
|
|
|
|
{
|
2003-11-03 22:47:08 +01:00
|
|
|
doQuiesce = __quiesce;
|
2003-11-03 02:52:40 +01:00
|
|
|
doStatisticsInsts = __statistics;
|
|
|
|
doCheckpointInsts = __checkpoint;
|
|
|
|
}
|
2004-08-02 23:10:02 +02:00
|
|
|
|
|
|
|
void debugbreak(ExecContext *xc)
|
|
|
|
{
|
|
|
|
debug_break();
|
|
|
|
}
|
|
|
|
|
|
|
|
void switchcpu(ExecContext *xc)
|
|
|
|
{
|
|
|
|
if (SampCPU)
|
|
|
|
SampCPU->switchCPUs();
|
|
|
|
}
|
2003-11-03 02:43:39 +01:00
|
|
|
}
|