Move the m5 pseudo instructions into their own file
arch/alpha/isa_desc: Move the pseudo instructions out of the isa_desc, into their own file and call out to them when they're to be accessed sim/sim_events.cc: sim/sim_events.hh: sim/sim_exit.hh: move SimExit to sim_exit.cc --HG-- extra : convert_revision : 1c393adb1c18bd0fef065057d7f4e9cf60ac4197
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6 changed files with 157 additions and 57 deletions
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@ -28,12 +28,11 @@ let {{
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#include "cpu/simple_cpu/simple_cpu.hh"
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#include "cpu/static_inst.hh"
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#include "sim/annotation.hh"
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#include "sim/serialize.hh"
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#include "sim/sim_events.hh"
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#include "sim/sim_stats.hh"
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#include "sim/sim_exit.hh"
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#ifdef FULL_SYSTEM
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#include "targetarch/ev5.hh"
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#include "arch/alpha/ev5.hh"
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#include "arch/alpha/pseudo_inst.hh"
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#endif
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namespace AlphaISA;
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@ -2429,62 +2428,28 @@ decode OPCODE default Unknown::unknown() {
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}}, No_OpClass);
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0x20: m5exit_old({{
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if (!xc->misspeculating())
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SimExit(curTick, "m5_exit_old instruction encountered");
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AlphaPseudo::m5exit_old(xc);
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}}, No_OpClass);
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0x21: m5exit({{
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if (!xc->misspeculating()) {
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Tick delay = xc->regs.intRegFile[16];
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Tick when = curTick + NS2Ticks(delay);
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SimExit(when, "m5_exit instruction encountered");
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}
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if (!xc->misspeculating())
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AlphaPseudo::m5exit(xc);
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}}, No_OpClass);
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0x30: initparam({{ Ra = xc->cpu->system->init_param; }});
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0x40: resetstats({{
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if (!xc->misspeculating()) {
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using namespace Statistics;
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Tick delay = xc->regs.intRegFile[16];
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Tick period = xc->regs.intRegFile[17];
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Tick when = curTick + NS2Ticks(delay);
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Tick repeat = NS2Ticks(period);
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SetupEvent(Reset, when, repeat);
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}
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if (!xc->misspeculating())
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AlphaPseudo::resetstats(xc);
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}});
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0x41: dumpstats({{
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if (!xc->misspeculating()) {
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using namespace Statistics;
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Tick delay = xc->regs.intRegFile[16];
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Tick period = xc->regs.intRegFile[17];
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Tick when = curTick + NS2Ticks(delay);
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Tick repeat = NS2Ticks(period);
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SetupEvent(Dump, when, repeat);
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}
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if (!xc->misspeculating())
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AlphaPseudo::dumpstats(xc);
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}});
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0x42: dumpresetstats({{
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if (!xc->misspeculating()) {
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using namespace Statistics;
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Tick delay = xc->regs.intRegFile[16];
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Tick period = xc->regs.intRegFile[17];
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Tick when = curTick + NS2Ticks(delay);
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Tick repeat = NS2Ticks(period);
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SetupEvent(Dump|Reset, when, repeat);
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}
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if (!xc->misspeculating())
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AlphaPseudo::dumpresetstats(xc);
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}});
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0x43: m5checkpoint({{
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if (!xc->misspeculating()) {
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Tick delay = xc->regs.intRegFile[16];
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Tick period = xc->regs.intRegFile[17];
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Tick when = curTick + NS2Ticks(delay);
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Tick repeat = NS2Ticks(period);
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SetupCheckpoint(when, repeat);
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}
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if (!xc->misspeculating())
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AlphaPseudo::m5checkpoint(xc);
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}});
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}
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}
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101
arch/alpha/pseudo_inst.cc
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101
arch/alpha/pseudo_inst.cc
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@ -0,0 +1,101 @@
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/*
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* Copyright (c) 2003 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "arch/alpha/pseudo_inst.hh"
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#include "cpu/exec_context.hh"
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#include "sim/serialize.hh"
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#include "sim/sim_exit.hh"
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#include "sim/sim_stats.hh"
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using namespace Statistics;
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namespace AlphaPseudo
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{
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void
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m5exit_old(ExecContext *xc)
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{
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SimExit(curTick, "m5_exit_old instruction encountered");
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}
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void
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m5exit(ExecContext *xc)
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{
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Tick delay = xc->regs.intRegFile[16];
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Tick when = curTick + NS2Ticks(delay);
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SimExit(when, "m5_exit instruction encountered");
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}
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void
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resetstats(ExecContext *xc)
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{
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Tick delay = xc->regs.intRegFile[16];
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Tick period = xc->regs.intRegFile[17];
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Tick when = curTick + NS2Ticks(delay);
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Tick repeat = NS2Ticks(period);
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SetupEvent(Reset, when, repeat);
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}
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void
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dumpstats(ExecContext *xc)
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{
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Tick delay = xc->regs.intRegFile[16];
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Tick period = xc->regs.intRegFile[17];
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Tick when = curTick + NS2Ticks(delay);
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Tick repeat = NS2Ticks(period);
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SetupEvent(Dump, when, repeat);
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}
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void
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dumpresetstats(ExecContext *xc)
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{
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Tick delay = xc->regs.intRegFile[16];
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Tick period = xc->regs.intRegFile[17];
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Tick when = curTick + NS2Ticks(delay);
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Tick repeat = NS2Ticks(period);
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SetupEvent(Dump|Reset, when, repeat);
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}
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void
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m5checkpoint(ExecContext *xc)
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{
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Tick delay = xc->regs.intRegFile[16];
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Tick period = xc->regs.intRegFile[17];
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Tick when = curTick + NS2Ticks(delay);
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Tick repeat = NS2Ticks(period);
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SetupCheckpoint(when, repeat);
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}
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}
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39
arch/alpha/pseudo_inst.hh
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39
arch/alpha/pseudo_inst.hh
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@ -0,0 +1,39 @@
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/*
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* Copyright (c) 2003 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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class ExecContext;
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namespace AlphaPseudo
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{
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void m5exit(ExecContext *xc);
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void m5exit_old(ExecContext *xc);
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void resetstats(ExecContext *xc);
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void dumpstats(ExecContext *xc);
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void dumpresetstats(ExecContext *xc);
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void m5checkpoint(ExecContext *xc);
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}
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@ -63,12 +63,6 @@ SimExitEvent::description()
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return "simulation termination";
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}
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void
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SimExit(Tick when, const char *message)
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{
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static SimExitEvent event(when, message);
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}
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//
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// constructor: automatically schedules at specified time
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//
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@ -66,8 +66,6 @@ class SimExitEvent : public Event
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virtual const char *description();
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};
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void SimExit(Tick when, const char *message);
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//
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// Event class to terminate simulation after 'n' related events have
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// occurred using a shared counter: used to terminate when *all*
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@ -31,11 +31,14 @@
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#include <string>
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#include "sim/host.hh"
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class Callback;
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void registerExitCallback(Callback *);
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void exitNow(const std::string &cause, int exit_code);
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void exitNow(const char *cause, int exit_code);
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void SimExit(Tick when, const char *message);
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#endif // __SIM_EXIT_HH__
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