2006-06-22 03:28:57 +02:00
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#include "asm.h"
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2006-09-06 19:27:19 +02:00
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2006-09-06 19:04:06 +02:00
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.set PROT_MODE_CSEG,0x8 # code segment selector
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.set PROT_MODE_DSEG,0x10 # data segment selector
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2006-09-06 19:04:06 +02:00
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.set CR0_PE_ON,0x1 # protected mode enable flag
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2006-09-06 19:27:19 +02:00
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2006-09-06 21:08:14 +02:00
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#########################################################################
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2006-09-08 16:36:44 +02:00
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# ENTRY POINT for the bootstrap processor
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# This code should be stored in the first sector of the hard disk.
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# After the BIOS initializes the hardware on startup or system reset,
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# it loads this code at physical address 0x7c00 - 0x7d00 (512 bytes).
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# Then the BIOS jumps to the beginning of it, address 0x7c00,
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# while running in 16-bit real-mode (8086 compatibility mode).
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# The Code Segment register (CS) is initially zero on entry.
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#
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# This code switches into 32-bit protected mode so that all of
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# memory can accessed, then calls into C.
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#########################################################################
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.globl start # Entry point
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start:
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.code16 # This runs in real mode
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cli # Disable interrupts
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cld # String operations increment
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2006-09-06 19:04:06 +02:00
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# Set up the important data segment registers (DS, ES, SS).
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xorw %ax,%ax # Segment number zero
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movw %ax,%ds # -> Data Segment
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movw %ax,%es # -> Extra Segment
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movw %ax,%ss # -> Stack Segment
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# Set up the stack pointer, growing downward from 0x7c00.
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movw $start,%sp # Stack Pointer
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2006-09-06 21:08:14 +02:00
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# Enable A20:
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# For fascinating historical reasons (related to the fact that
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# the earliest 8086-based PCs could only address 1MB of physical
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# memory and subsequent 80286-based PCs wanted to retain maximum
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# compatibility), physical address line 20 is tied to low when the
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# machine boots. Obviously this a bit of a drag for us, especially
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# when trying to address memory above 1MB. This code undoes this.
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2006-09-06 19:04:06 +02:00
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seta20.1:
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inb $0x64,%al # Get status
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testb $0x2,%al # Busy?
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jnz seta20.1 # Yes
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movb $0xd1,%al # Command: Write
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outb %al,$0x64 # output port
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seta20.2:
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inb $0x64,%al # Get status
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testb $0x2,%al # Busy?
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jnz seta20.2 # Yes
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movb $0xdf,%al # Enable
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outb %al,$0x60 # A20
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2006-09-06 21:08:14 +02:00
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# Switch from real to protected mode
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# The descriptors in our GDT allow all physical memory to be accessed.
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# Furthermore, the descriptors have base addresses of 0, so that the
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# segment translation is a NOP, ie. virtual addresses are identical to
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# their physical addresses. With this setup, immediately after
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# enabling protected mode it will still appear to this code
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# that it is running directly on physical memory with no translation.
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# This initial NOP-translation setup is required by the processor
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# to ensure that the transition to protected mode occurs smoothly.
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real_to_prot:
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cli # Mandatory since we dont set up an IDT
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lgdt gdtdesc # load GDT -- mandatory in protected mode
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movl %cr0, %eax # turn on protected mode
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orl $CR0_PE_ON, %eax #
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movl %eax, %cr0 #
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### CPU magic: jump to relocation, flush prefetch queue, and reload %cs
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### Has the effect of just jmp to the next instruction, but simultaneous
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### loads CS with $PROT_MODE_CSEG.
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ljmp $PROT_MODE_CSEG, $protcseg
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2006-09-06 19:27:19 +02:00
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2006-06-12 17:22:12 +02:00
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#### we are in 32-bit protected mode (hence the .code32)
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.code32
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protcseg:
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# Set up the protected-mode data segment registers
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movw $PROT_MODE_DSEG, %ax # Our data segment selector
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movw %ax, %ds # -> DS: Data Segment
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movw %ax, %es # -> ES: Extra Segment
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movw %ax, %fs # -> FS
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movw %ax, %gs # -> GS
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movw %ax, %ss # -> SS: Stack Segment
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call cmain # finish the boot load from C.
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# cmain() should not return
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spin:
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jmp spin # ..but in case it does, spin
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.p2align 2 # force 4 byte alignment
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gdt:
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SEG_NULLASM # null seg
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SEG_ASM(STA_X|STA_R, 0x0, 0xffffffff) # code seg
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SEG_ASM(STA_W, 0x0, 0xffffffff) # data seg
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gdtdesc:
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.word 0x17 # sizeof(gdt) - 1
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.long gdt # address gdt
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