xv6-cs450/main.c

103 lines
2.4 KiB
C
Raw Normal View History

2006-06-12 17:22:12 +02:00
#include "types.h"
2007-08-28 01:26:33 +02:00
#include "defs.h"
2006-06-12 17:22:12 +02:00
#include "param.h"
#include "mmu.h"
#include "proc.h"
#include "x86.h"
2007-08-28 06:13:24 +02:00
static void bootothers(void);
2006-09-08 16:36:44 +02:00
// Bootstrap processor starts running C code here.
2007-08-28 01:32:16 +02:00
int
main(void)
2006-06-12 17:22:12 +02:00
{
int i;
2007-08-24 21:36:52 +02:00
static volatile int bcpu; // cannot be on stack
2007-08-28 06:13:24 +02:00
extern char edata[], end[];
2006-06-14 00:08:20 +02:00
// clear BSS
memset(edata, 0, end - edata);
2006-08-29 21:06:37 +02:00
// Prevent release() from enabling interrupts.
for(i=0; i<NCPU; i++)
cpus[i].nlock = 1;
2006-07-12 19:00:54 +02:00
mp_init(); // collect info about this machine
bcpu = mp_bcpu();
2007-08-24 21:36:52 +02:00
// Switch to bootstrap processor's stack
asm volatile("movl %0, %%esp" : : "r" (cpus[bcpu].mpstack+MPSTACK-32));
asm volatile("movl %0, %%ebp" : : "r" (cpus[bcpu].mpstack+MPSTACK));
2006-07-12 19:00:54 +02:00
lapic_init(bcpu);
2007-08-28 01:26:33 +02:00
cprintf("\ncpu%d: starting xv6\n\n", cpu());
2006-06-12 17:22:12 +02:00
pinit(); // process table
binit(); // buffer cache
pic_init(); // interrupt controller
ioapic_init(); // another interrupt controller
kinit(); // physical memory allocator
tvinit(); // trap vectors
idtinit(); // interrupt descriptor table
fileinit(); // file table
iinit(); // inode cache
setupsegs(0); // segments & TSS
console_init(); // I/O devices & their interrupts
ide_init(); // disk
bootothers(); // boot other CPUs
if(!ismp)
2007-08-28 06:40:58 +02:00
timer_init(); // uniprocessor timer
userinit(); // first user process
// enable interrupts on this processor.
cpus[cpu()].nlock--;
sti();
2006-06-16 22:29:25 +02:00
2006-07-11 03:07:40 +02:00
scheduler();
2006-06-12 17:22:12 +02:00
}
2006-06-22 22:47:23 +02:00
// Additional processors start here.
2006-07-16 18:03:51 +02:00
void
mpmain(void)
{
2007-08-28 01:26:33 +02:00
cprintf("cpu%d: starting\n", cpu());
2007-08-24 21:36:52 +02:00
idtinit();
lapic_init(cpu());
setupsegs(0);
cpuid(0, 0, 0, 0, 0); // memory barrier
cpus[cpu()].booted = 1;
// Enable interrupts on this processor.
cpus[cpu()].nlock--;
sti();
scheduler();
}
2007-08-28 06:40:58 +02:00
static void
bootothers(void)
{
extern uchar _binary_bootother_start[], _binary_bootother_size[];
uchar *code;
struct cpu *c;
// Write bootstrap code to unused memory at 0x7000.
code = (uchar*)0x7000;
memmove(code, _binary_bootother_start, (uint)_binary_bootother_size);
for(c = cpus; c < cpus+ncpu; c++){
if(c == cpus+cpu()) // We've started already.
continue;
2007-08-28 06:13:24 +02:00
// Fill in %esp, %eip and start code on cpu.
*(void**)(code-4) = c->mpstack + MPSTACK;
*(void**)(code-8) = mpmain;
lapic_startap(c->apicid, (uint)code);
// Wait for cpu to get through bootstrap.
while(c->booted == 0)
;
}
}