Before this change overflowing the free running clock counter
between the time the timer was read and the time the overflow
check was done resulted in read_tsc_64 returning a to high value.
Change-Id: I1022f271213647f720477c4121d45f0c965456c6
* Allow to change the timer frequency using the hz paramter.
* Unmask the interrupt only after registering the handler.
* Pass the hz parameter in the command line.
. set 'done' once initialized so 32-bit read frc works,
thanks to keesj
. make sure the software-implemented upper 32 bit of the 64-bit
"tsc" value works OK by adding an assert in one of its calls
Change-Id: I5ce24fea919f4610c6a86ac7ec9f04b1815620c2
Omap timers remove hardcoded base address and add some initial
support for the beaglebone's timers. Frclock_util will need
refactoring to remain independent of the ARM flavour.
Change-Id: I2b5d04e930364262c81b5686de634c0a51796b23
The Cycle CouNTer on ARM cannot be used reliably as it wraps around
rather quickly and can be altered by user space (on Minix). Furthermore,
it's buggy when wrapping and is not implemented at all on the Linaro
Beagleboard emulator.
This patch programs GPTIMER10 as a free running clock at 1.625 MHz (it
doesn't generate interrupts). It's memory mapped into every process,
which enables libsys to provide micro_delay().
Change-Id: Iba004c6c62976762fe154ea390d69e518eec1531
Due to the ABI we are using we have to use the earm architecture
moniker for the build system to behave correctly. This involves
then some headers to move around.
There is also a few related Makefile updates as well as minor
source code corrections.
2013-01-17 10:03:58 +01:00
Renamed from kernel/arch/arm/omap_timer.c (Browse further)
