gem5/src
Andreas Hansson f1ec326be5 mem: Do not alter cache block state on uncacheable snoops
This patch ensures we do not respond with a Modified (dirty and
writable) line if the request is uncacheable, and that the cache
responding retains the line without modifying the state (even if
responding).
2015-12-31 09:33:25 -05:00
..
arch arm: remote GDB: rationalize structure of register offsets 2015-12-18 15:12:07 -06:00
base arm: remote GDB: rationalize structure of register offsets 2015-12-18 15:12:07 -06:00
cpu mem: Make cache terminology easier to understand 2015-12-31 09:32:58 -05:00
dev mem: Make cache terminology easier to understand 2015-12-31 09:32:58 -05:00
doc cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
doxygen MEM: Put memory system document into doxygen 2012-09-25 11:49:41 -05:00
kern misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
mem mem: Do not alter cache block state on uncacheable snoops 2015-12-31 09:33:25 -05:00
proto cpu: Support virtual addr in elastic traces 2015-12-07 16:42:16 -06:00
python dev: Move network devices to src/dev/net/ 2015-12-10 10:35:18 +00:00
sim sim: Use the old work item behavior by default 2015-12-18 10:14:17 +00:00
unittest base: Rewrite the CircleBuf to fix bugs and add serialization 2015-08-07 09:59:19 +01:00
Doxyfile Doxygen: Update the version of the Doxyfile 2012-10-11 06:38:42 -04:00
SConscript sim: tag-based checkpoint versioning 2015-09-02 15:23:30 -05:00