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memtest
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Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.
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2006-03-04 15:18:40 -05:00 |
o3
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Merge ktlim@zizzer:/bk/m5
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2006-03-08 13:26:30 -05:00 |
ozone
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Cleaned up some of the Fault system.
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2006-03-01 05:26:08 -05:00 |
simple
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Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
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2006-03-09 15:15:55 -05:00 |
trace
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Made Addr a global type
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2006-02-21 03:38:21 -05:00 |
base.cc
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Fixes to allow the ExecContext to be used for profiling.
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2006-03-07 22:21:39 -05:00 |
base.hh
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Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.
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2006-03-04 15:18:40 -05:00 |
base_dyn_inst.cc
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Merge ktlim@zizzer:/bk/m5
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2006-03-05 00:34:54 -05:00 |
base_dyn_inst.hh
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Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.
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2006-03-04 15:18:40 -05:00 |
cpu_exec_context.cc
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Move quiesce event to its own class.
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2006-04-22 18:11:54 -04:00 |
cpu_exec_context.hh
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Move quiesce event to its own class.
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2006-04-22 18:11:54 -04:00 |
cpu_models.py
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Enable building only selected CPU models via new scons
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2006-02-23 17:00:29 -05:00 |
exec_context.hh
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no more common syscall emulation, now common for everyone
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2006-03-09 15:42:09 -05:00 |
exetrace.cc
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Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.
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2006-03-04 15:18:40 -05:00 |
exetrace.hh
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Made Addr a global type
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2006-02-21 03:38:21 -05:00 |
inst_seq.hh
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fix problems on darwin/*BSD for syscall emulation mode
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2006-02-10 14:21:32 -05:00 |
intr_control.cc
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Updates for the quiesceEvent that was added to the XC.
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2006-03-07 19:59:12 -05:00 |
intr_control.hh
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Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.
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2006-03-04 15:18:40 -05:00 |
pc_event.cc
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Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.
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2006-03-04 15:18:40 -05:00 |
pc_event.hh
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Made Addr a global type
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2006-02-21 03:38:21 -05:00 |
profile.cc
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Updates for the quiesceEvent that was added to the XC.
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2006-03-07 19:59:12 -05:00 |
profile.hh
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Updates for the quiesceEvent that was added to the XC.
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2006-03-07 19:59:12 -05:00 |
quiesce_event.cc
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Move quiesce event to its own class.
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2006-04-22 18:11:54 -04:00 |
quiesce_event.hh
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Move quiesce event to its own class.
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2006-04-22 18:11:54 -04:00 |
SConscript
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Make sure cpu/static_inst_exec_sigs.hh get rebuilt when
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2006-02-25 22:57:46 -05:00 |
smt.hh
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Many files:
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2005-06-05 05:16:00 -04:00 |
static_inst.cc
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Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths.
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2006-02-19 02:34:37 -05:00 |
static_inst.hh
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Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included.
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2006-03-03 15:28:25 -05:00 |