gem5/tests/quick/se/70.tgen
Andreas Hansson 74553c7d3f stats: Update the stats to reflect bus and memory changes
This patch updates the stats to reflect the addition of the bus stats,
and changes to the bus layers. In addition it updates the stats to
match the addition of the static pipeline latency of the memory
conotroller and the addition of a stat tracking the bytes per
activate.
2013-05-30 12:54:18 -04:00
..
ref/arm/linux stats: Update the stats to reflect bus and memory changes 2013-05-30 12:54:18 -04:00
test-frfcfs-toy.trc TrafficGen: Add a basic traffic generator regression 2012-09-21 11:48:11 -04:00
test-open-ops.trc TrafficGen: Add a basic traffic generator regression 2012-09-21 11:48:11 -04:00
test-refresh.trc TrafficGen: Add a basic traffic generator regression 2012-09-21 11:48:11 -04:00
test-writebuffer.trc TrafficGen: Add a basic traffic generator regression 2012-09-21 11:48:11 -04:00
test-writefrfcfs.trc TrafficGen: Add a basic traffic generator regression 2012-09-21 11:48:11 -04:00
test.py TrafficGen: Add a basic traffic generator regression 2012-09-21 11:48:11 -04:00
tgen-simple-dram.cfg config: Reduce DRAM controller regression traffic rate 2013-01-07 13:05:36 -05:00
tgen-simple-dram.trc SimpleDRAM: A basic SimpleDRAM regression 2012-09-21 11:48:14 -04:00
tgen-simple-mem.cfg TrafficGen: Add a basic traffic generator regression 2012-09-21 11:48:11 -04:00
tgen-simple-mem.trc cpu: Add support for protobuf input for the trace generator 2013-01-07 13:05:37 -05:00