gem5/src/arch/arm
2010-06-02 12:58:14 -05:00
..
insts ARM: Implement the VFP version of vmul. 2010-06-02 12:58:14 -05:00
isa ARM: Implement the VFP version of vneg. 2010-06-02 12:58:14 -05:00
linux ARM: Allow ARM processes to start in Thumb mode. 2010-06-02 12:58:00 -05:00
ArmInterrupts.py ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
ArmNativeTrace.py ARM: Make the ARM native tracer stop M5 if control diverges. 2009-07-29 00:17:11 -07:00
ArmSystem.py ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
ArmTLB.py arm: Unify the ARM tlb. We forgot about this when we did the rest. 2009-04-21 15:40:25 -07:00
faults.cc ARM: Implement and update the DFSR and IFSR registers on faults. 2010-06-02 12:58:14 -05:00
faults.hh ARM: Implement and update the DFSR and IFSR registers on faults. 2010-06-02 12:58:14 -05:00
interrupts.cc ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
interrupts.hh ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
intregs.hh ARM: Allow flattening into any mode. 2010-06-02 12:58:11 -05:00
isa.hh ARM: Handle accesses to TLBTR. 2010-06-02 12:58:13 -05:00
isa_traits.hh ARM: Move PC mode bits around so they can be used for exectrace 2010-06-02 12:58:13 -05:00
kernel_stats.hh ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
locked_mem.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
microcode_rom.hh arm: include missing file for arm 2009-04-21 15:40:26 -07:00
miscregs.cc ARM: Convert the CP15 registers from MPU to MMU. 2010-06-02 12:58:13 -05:00
miscregs.hh ARM: Implement and update the DFSR and IFSR registers on faults. 2010-06-02 12:58:14 -05:00
mmaped_ipr.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
nativetrace.cc ARM: Split the condition codes out of the CPSR. 2009-11-08 02:08:40 -08:00
nativetrace.hh ARM: Make the ARM native tracer stop M5 if control diverges. 2009-07-29 00:17:11 -07:00
pagetable.cc arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
pagetable.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
predecoder.hh ARM: Make the predecoder print out the ExtMachInst it gathered when traced. 2010-06-02 12:58:03 -05:00
process.cc ARM: Move the mmap region to where Linux actually has it. 2010-06-02 12:58:04 -05:00
process.hh ARM: Allow ARM processes to start in Thumb mode. 2010-06-02 12:58:00 -05:00
registers.hh ARM: Allow flattening into any mode. 2010-06-02 12:58:11 -05:00
remote_gdb.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
SConscript ARM: Implement a function to decode CP15 registers to MiscReg indices. 2010-06-02 12:58:08 -05:00
SConsopts arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
stacktrace.cc ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
stacktrace.hh ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
system.cc ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
system.hh ARM: Boilerplate full-system code. 2009-11-17 18:02:08 -06:00
tlb.cc ARM: Implement and update the DFSR and IFSR registers on faults. 2010-06-02 12:58:14 -05:00
tlb.hh ARM: Implement the V7 version of alignment checking. 2010-06-02 12:58:10 -05:00
types.hh ARM: Implement a badMode function that says whether a mode is legal. 2010-06-02 12:58:11 -05:00
utility.cc ARM: Replace the "never" condition with the "unconditional" condition. 2010-06-02 12:58:00 -05:00
utility.hh ARM: Rework how unrecognized/unimplemented instructions are handled. 2010-06-02 12:58:04 -05:00
vtophys.cc arm: add ARM support to M5 2009-04-05 18:53:15 -07:00
vtophys.hh arm: add ARM support to M5 2009-04-05 18:53:15 -07:00