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gem5/src/arch/alpha
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Steve Reinhardt 1b6355c895 cpu. arch: add initiateMemRead() to ExecContext interface 
For historical reasons, the ExecContext interface had a single
function, readMem(), that did two different things depending on
whether the ExecContext supported atomic memory mode (i.e.,
AtomicSimpleCPU) or timing memory mode (all the other models).
In the former case, it actually performed a memory read; in the
latter case, it merely initiated a read access, and the read
completion did not happen until later when a response packet
arrived from the memory system.

This led to some confusing things, including timing accesses
being required to provide a pointer for the return data even
though that pointer was only used in atomic mode.

This patch splits this interface, adding a new initiateMemRead()
function to the ExecContext interface to replace the timing-mode
use of readMem().

For consistency and clarity, the readMemTiming() helper function
in the ISA definitions is renamed to initiateMemRead() as well.
For x86, where the access size is passed in explicitly, we can
also get rid of the data parameter at this level.  For other ISAs,
where the access size is determined from the type of the data
parameter, we have to keep the parameter for that purpose.
2016-01-17 18:27:46 -08:00
..
freebsd MEM: Make port proxies use references rather than pointers 2012-02-24 11:45:30 -05:00
isa cpu. arch: add initiateMemRead() to ExecContext interface 2016-01-17 18:27:46 -08:00
linux sim: revert 6709bbcf564d 2014-10-22 15:59:57 -05:00
tru64 sim: Add helper functions that add PCEvents with custom arguments 2013-04-22 13:20:31 -04:00
AlphaInterrupts.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
AlphaISA.py arch, cpu: Add support for flattening misc register indexes. 2014-01-24 15:29:30 -06:00
AlphaSystem.py power: Add basic DVFS support for gem5 2014-06-30 13:56:06 -04:00
AlphaTLB.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
aout_machdep.h style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
decoder.cc ISA,CPU: Generalize and split out the components of the decode cache. 2012-05-26 13:45:12 -07:00
decoder.hh isa: Add parameter to pick different decoder inside ISA 2015-10-09 14:50:54 -05:00
ecoff_machdep.h New directory structure: 2006-05-22 14:29:33 -04:00
ev5.cc sim: don't ignore SIG_TRAP 2016-01-17 18:27:46 -08:00
ev5.hh Alpha: Pull the MiscRegFile fully into the ISA object. 2009-07-08 23:02:22 -07:00
faults.cc mem, alpha: Move Alpha-specific request flags 2015-05-05 03:22:31 -04:00
faults.hh scons: Enable -Wextra by default 2016-01-11 05:52:20 -05:00
idle_event.cc style: Make a style pass over the whole arch/alpha directory. 2008-09-27 21:03:48 -07:00
idle_event.hh Put kernel_stats back into arch. 2006-11-07 22:34:34 -05:00
interrupts.cc Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object. 2008-10-12 09:09:56 -07:00
interrupts.hh sim: Refactor the serialization base class 2015-07-07 09:51:03 +01:00
ipr.cc style: Make a style pass over the whole arch/alpha directory. 2008-09-27 21:03:48 -07:00
ipr.hh style: Make a style pass over the whole arch/alpha directory. 2008-09-27 21:03:48 -07:00
isa.cc sim: Refactor the serialization base class 2015-07-07 09:51:03 +01:00
isa.hh misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
isa_traits.hh arch: Cleanup unused ISA traits constants 2014-09-03 07:42:21 -04:00
kernel_stats.cc sim: Refactor the serialization base class 2015-07-07 09:51:03 +01:00
kernel_stats.hh misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
locked_mem.hh cpu: Always mask the snoop address when performing lock check 2014-12-02 06:08:00 -05:00
microcode_rom.hh CPU: Create a microcode ROM object in the CPU which is defined by the ISA. 2008-10-12 15:59:21 -07:00
mmapped_ipr.hh arch: Add support for m5ops using mmapped IPRs 2013-09-30 12:20:43 +02:00
mt.hh clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6 2012-04-14 05:43:31 -04:00
osfpal.cc style: Make a style pass over the whole arch/alpha directory. 2008-09-27 21:03:48 -07:00
osfpal.hh style: Make a style pass over the whole arch/alpha directory. 2008-09-27 21:03:48 -07:00
pagetable.cc sim: Refactor the serialization base class 2015-07-07 09:51:03 +01:00
pagetable.hh misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
process.cc sim: Refactor the serialization base class 2015-07-07 09:51:03 +01:00
process.hh misc: Add explicit overrides and fix other clang >= 3.5 issues 2015-10-12 04:08:01 -04:00
pseudo_inst.hh kvm, x86: Adding support for SE mode execution 2014-11-23 18:01:08 -08:00
registers.hh revert 5af8f40d8f2c 2015-07-28 01:58:04 -05:00
regredir.cc SE/FS: Get rid of uses of FULL_SYSTEM in Alpha. 2011-11-01 04:01:14 -07:00
regredir.hh Registers: Add a registers.hh file as an ISA switched header. 2009-07-08 23:02:21 -07:00
remote_gdb.cc arm: remote GDB: rationalize structure of register offsets 2015-12-18 15:12:07 -06:00
remote_gdb.hh arm: remote GDB: rationalize structure of register offsets 2015-12-18 15:12:07 -06:00
SConscript arch: teach ISA parser how to split code across files 2014-05-09 18:58:47 -04:00
SConsopts alpha: get rid of all turbolaser remnants 2009-04-08 22:22:49 -07:00
stacktrace.cc arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
stacktrace.hh arch: Use const StaticInstPtr references where possible 2014-09-27 09:08:36 -04:00
system.cc sim: Refactor the serialization base class 2015-07-07 09:51:03 +01:00
system.hh misc: Add explicit overrides and fix other clang >= 3.5 issues 2015-10-12 04:08:01 -04:00
tlb.cc sim: Refactor the serialization base class 2015-07-07 09:51:03 +01:00
tlb.hh misc: Add explicit overrides and fix other clang >= 3.5 issues 2015-10-12 04:08:01 -04:00
types.hh arch: get rid of unused LargestRead typedef 2016-01-17 18:27:46 -08:00
utility.cc revert 5af8f40d8f2c 2015-07-28 01:58:04 -05:00
utility.hh scons: Enable -Wextra by default 2016-01-11 05:52:20 -05:00
vtophys.cc MEM: Make port proxies use references rather than pointers 2012-02-24 11:45:30 -05:00
vtophys.hh MEM: Make port proxies use references rather than pointers 2012-02-24 11:45:30 -05:00