gem5/src
Andreas Sandberg c84745e2cb config: Fix broken SimObject listing
The gem5 option '--list-sim-objects' is supposed to list all available
SimObjects and their parameters. It currently chokes on SimObjects
with parameters that have an object instance as their default
value. This is caused by __str__ in SimObject trying to resolve its
complete path. When the path resolution method reaches the parent
object (a MetaSimObject since it hasn't been instantiated), it dies
with a Python exception.

This changeset adds a guard to stop path resolution if the parent
object is a MetaSimObject.
2015-12-01 13:01:05 +00:00
..
arch arm: Fix fplib 128-bit shift operators 2015-11-22 05:10:18 -05:00
base misc: Appease clang static analyzer 2015-11-06 03:26:16 -05:00
cpu cpu: Fix base FP and CC register index in o3 insertThread() 2015-11-22 05:10:19 -05:00
dev dev: Remove unnecessary header include 2015-11-24 10:13:04 +00:00
doc cpu: `Minor' in-order CPU model 2014-07-23 16:09:04 -05:00
doxygen MEM: Put memory system document into doxygen 2012-09-25 11:49:41 -05:00
kern misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
mem mem: Fix search-replace issues in DRAMPower wrapper license 2015-11-25 13:52:56 -05:00
proto cpu: add support for outputing a protobuf formatted CPU trace 2015-02-16 03:32:38 -05:00
python config: Fix broken SimObject listing 2015-12-01 13:01:05 +00:00
sim misc: Add explicit overrides and fix other clang >= 3.5 issues 2015-10-12 04:08:01 -04:00
unittest base: Rewrite the CircleBuf to fix bugs and add serialization 2015-08-07 09:59:19 +01:00
Doxyfile Doxygen: Update the version of the Doxyfile 2012-10-11 06:38:42 -04:00
SConscript sim: tag-based checkpoint versioning 2015-09-02 15:23:30 -05:00